[LinuxBIOS] different versions of the GA-M57SLI-S4 (PLCC vs SPI)

echelon at free.fr echelon at free.fr
Mon Sep 3 01:43:27 CEST 2007


Hmmm.. interesting findings I made!..
First of all I have to apologize because I have given some erroneous information
in my previous posts..
Here we go:

Quoting Peter Stuge <peter at stuge.se>:
> > > Could you see if the SPI
> > > flash chip is connected to the Super IO?
> >
> > They are about 5 or 6 cm apart.
>
> It's not really possible to tell from visual inspection. Maybe with
> some measurements.

Indeed it is!!! But NOT in the way this datasheet
(http://www.ite.com.tw/product_info/file/pc/IT8716F_V0.3.zip)
 says! Here are the real connections I found on my board:

super_io-pad55 -> spi_chip-pad5 (SI)
super_io-pad56 -> spi_chip-pad6 (SCK)
super_io-pad60 -> spi_chip-pad2 (SO)
super_io-pad61 -> spi_chip-pad1 (nCS)

nHOLD (pad 7 of spi chip) and nWP (pad 3 of spi chip) are not controlled at all
by the super io chip!

I have a little question : does someone have a more up-to-date version of the DS
of the it8716 chip? It seems to me that the version that can be currently
downloaded on the ite website doesn't match at all the chip revision used on
gigabyte mobo.. (regarding the electrical interface at least..)

 Florentin




More information about the coreboot mailing list