[coreboot] r678 - coreboot-v3/southbridge/amd/cs5536

[svn at coreboot.org]

Author: rminnich
Date: 2008-05-08 16:51:40 +0200 (Thu, 08 May 2008)
New Revision: 678

Modified:
   coreboot-v3/southbridge/amd/cs5536/cs5536.c
Log:
Changed erroneous write config 8 to write config 32
Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>

Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006 at gmx.net>


Modified: coreboot-v3/southbridge/amd/cs5536/cs5536.c
===================================================================
--- coreboot-v3/southbridge/amd/cs5536/cs5536.c	2008-05-07 23:21:55 UTC (rev 677)
+++ coreboot-v3/southbridge/amd/cs5536/cs5536.c	2008-05-08 14:51:40 UTC (rev 678)
@@ -602,7 +602,7 @@
 	// NOTE: Only 32-bit writes to the data buffer are allowed when PWB is set
 	ide_cfg = pci_read_config32(dev, IDE_CFG);
 	ide_cfg |= CHANEN | PWB;
-	pci_write_config8(dev, IDE_CFG, ide_cfg);
+	pci_write_config32(dev, IDE_CFG, ide_cfg);
 }