[coreboot] r866 - coreboot-v3/mainboard/artecgroup/dbe62

[svn at coreboot.org]

Author: rminnich
Date: 2008-09-17 18:38:16 +0200 (Wed, 17 Sep 2008)
New Revision: 866

Modified:
   coreboot-v3/mainboard/artecgroup/dbe62/initram.c
Log:
Accidental commit -- this is a local change i have to have for my broken dbe62, 
and I committed it by accident.

Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
Acked-by: Ronald G. Minnich <rminnich at gmail.com>



Modified: coreboot-v3/mainboard/artecgroup/dbe62/initram.c
===================================================================
--- coreboot-v3/mainboard/artecgroup/dbe62/initram.c	2008-09-17 16:36:20 UTC (rev 865)
+++ coreboot-v3/mainboard/artecgroup/dbe62/initram.c	2008-09-17 16:38:16 UTC (rev 866)
@@ -65,7 +65,7 @@
 	{SPD_tRP, 0x58},
 	{SPD_PRIMARY_SDRAM_WIDTH, 8},
 	{SPD_NUM_BANKS_PER_SDRAM, 0x4},
-	{SPD_NUM_COLUMNS, 0x8}, /* 8kB */
+	{SPD_NUM_COLUMNS, 0xa}, /* 8kB */
 	{SPD_NUM_DIMM_BANKS, 0x1},
 	{SPD_REFRESH, 0x82},
 	{SPD_SDRAM_CYCLE_TIME_2ND, 0x0},