[coreboot] r3620 - trunk/coreboot-v2/src/northbridge/intel/i440bx

svn at coreboot.org svn at coreboot.org
Tue Sep 30 06:52:29 CEST 2008


Author: stuge
Date: 2008-09-30 06:52:29 +0200 (Tue, 30 Sep 2008)
New Revision: 3620

Modified:
   trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c
Log:
A duplicate register address is incremented in table register_values.
A trivial fix to correct the address of the high byte in SDRAMC.
Thus the leadoff timing IPDLT will be correctly referenced.

Signed-off-by: Mats Erik Andersson <mats.andersson at gisladisker.se>
Acked-by: Peter Stuge <peter at stuge.se>


Modified: trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c
===================================================================
--- trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c	2008-09-30 04:13:32 UTC (rev 3619)
+++ trunk/coreboot-v2/src/northbridge/intel/i440bx/raminit.c	2008-09-30 04:52:29 UTC (rev 3620)
@@ -282,7 +282,7 @@
 	 *         1 = 2 clocks of RAS# precharge
 	 */
 	SDRAMC + 0, 0x00, 0x00,
-	SDRAMC + 0, 0x00, 0x00,
+	SDRAMC + 1, 0x00, 0x00,
 
 	/* PGPOL - Paging Policy Register
 	 * 0x78 - 0x79





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