Intel Native Raminit: Difference between revisions

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Status page for all Intel based chipsets
Status page for all Intel based CPUs and MCHs
 
Native raminit is to replace the Intel provided closed source binary, that does initialize the memory. This binary is referenced as MRC (Memory Reference Code). Some platforms do support either MRC or native raminit, others only support one of them. In general one can summarize that DDR3 or DDR4 raminit is much more complex that DDR2 raminit, make it more difficult to provide open source and bug free raminit code.


== GM45 ==
== GM45 ==
Line 37: Line 39:
! Menu: Supported frequencies || || || ||
! Menu: Supported frequencies || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-1333 (666MHz) || yes || yes || yes ||
| DDR3-666 (333MHz) || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-1333 (800MHz) || yes || yes || yes ||
| DDR3-800 (400MHz) || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-2133 (1066Mhz) || yes || yes || yes ||
| DDR3-1066 (533Mhz) || yes || yes || yes ||
|- bgcolor="#eeeeee"
| DDR2-800 (400MHz) || yes || no || no ||
|- bgcolor="#eeeeee"
| DDR2-666 (333MHz) || yes || no || no ||
|- bgcolor="#6699dd"
! Menu: Supported CAS latencies || || || ||
|- bgcolor="#eeeee|
| CL6 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL7 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL8 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL9 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL10 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL11 || yes || yes || ? ||
|- bgcolor="#eeeee|
| CL12 || yes || no || ||
|- bgcolor="#eeeeee"
| CL13 || yes || no || ||
|- bgcolor="#eeeeee"
| CL14 || yes || no || ||
|- bgcolor="#eeeeee"
| CL15 || yes || no || ||
|- bgcolor="#eeeeee"
| CL16 || yes || no || ||
|- bgcolor="#6699dd"
! Menu: Boot paths || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR2-800 (400MHz) || yes || yes || yes ||
| Hot reset || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR2-666 (333MHz) || yes || yes || yes ||
| Resume from S3 || yes || yes || yes ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: MRC cache || || || ||
! Menu: MRC cache || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| MRC cache - S3 || yes || yes || yes ||
| MRC cache - S3 || yes || no || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| MRC cache - normal boot || yes || yes || yes - reset on SPD CRC16 difference ||
| MRC cache - normal || yes || no || ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: XMP support || || || ||
! Menu: XMP support || || || ||
Line 106: Line 138:
! Menu: Supported frequencies || || || ||
! Menu: Supported frequencies || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| ??? || ? || ? || ? ||
| DDR3-800 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| DDR3-1066 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| DDR3-1333 || yes || yes || ? ||
|- bgcolor="#6699dd"
! Menu: Supported CAS latencies || || || ||
|- bgcolor="#eeeee|
| CL6 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL7 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL8 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL9 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL10 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL11 || yes || yes || ? ||
|- bgcolor="#eeeee|
| CL12 || yes || no || ||
|- bgcolor="#eeeeee"
| CL13 || yes || no || ||
|- bgcolor="#eeeeee"
| CL14 || yes || no || ||
|- bgcolor="#eeeeee"
| CL15 || yes || no || ||
|- bgcolor="#eeeeee"
| CL16 || yes || no || ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: MRC cache || || || ||
! Menu: MRC cache || || || ||
Line 112: Line 172:
| MRC cache - S3 || yes || yes || yes ||
| MRC cache - S3 || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| MRC cache - normal boot || ? || ? || ? ||
| MRC cache - normal boot || yes || yes || yes ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: XMP support || || || ||
! Menu: XMP support || || || ||
Line 171: Line 231:
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR2-800 (400Mhz) || yes || yes || yes ||
| DDR2-800 (400Mhz) || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Supported CAS latencies || || || ||
|- bgcolor="#eeeee|
| CL4 || yes || yes || yes ||
|- bgcolor="#eeeeee"
| CL5 || yes || yes || yes ||
|- bgcolor="#eeeeee"
| CL6 || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Boot paths || || || ||
|- bgcolor="#eeeeee"
| Hot reset || yes || yes || yes ||
|- bgcolor="#eeeeee"
| Resume from S3 || yes || no || no ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: MRC cache || || || ||
! Menu: MRC cache || || || ||
Line 186: Line 260:
! Menu: Voltage Support || || || ||
! Menu: Voltage Support || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| 1.5V || yes || yes || yes ||
| 1.8V || yes || yes || yes || on ddr2
|- bgcolor="#6699dd"
! Menu: Manual Overwrites || || || ||
|- bgcolor="#6699dd"
! Menu: Overclocking || || || ||
|- bgcolor="#eeeeee"
| not implemented || no || no || no ||
|}
 
== X4x (Desktop Intel 4 series)==
 
'''Status'''
{| border="0" style="font-size: smaller"
|- bgcolor="#6699dd"
! align="left" | Option
! align="left" | Supported
! align="left" | Implemented
! align="left" | Working
! align="left" | Description
|- bgcolor="#eeeeee"
| Native raminit || yes || yes || yes ||
|- bgcolor="#eeeeee"
| MRC raminit || ? || ? || ? ||
|}
 
'''Native raminit features'''
{| border="0" style="font-size: smaller"
|- bgcolor="#6699dd"
! align="left" | Option
! align="left" | Supported
! align="left" | Implemented
! align="left" | Working
! align="left" | Description
|- bgcolor="#6699dd"
! Menu: Supported channels || || || ||
|- bgcolor="#eeeeee"
| single and dual channel || yes || yes || yes ||
|- bgcolor="#eeeeee"
| Up to 4 slots || yes || yes || ? || No such board in coreboot
|- bgcolor="#eeeeee"
| Up to 4 ranks per channel || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Supported frequencies || || || ||
|- bgcolor="#eeeeee"
| DDR2-533 (266Mhz) || yes || no || no || vendor bios bios supports this despite datasheets telling otherwise
|- bgcolor="#eeeeee"
| DDR2-666 (333Mhz) || yes || yes || yes ||
|- bgcolor="#eeeeee"
| DDR2-800 (400Mhz) || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Supported CAS latencies || || || ||
|- bgcolor="#eeeeee"
| CL5 || yes || yes || yes ||
|- bgcolor="#eeeeee"
| CL6 || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Supported CPU, FSB || || || ||
|- bgcolor="#eeeeee"
| 533MHz || yes || no || no || vendor bios bios supports this despite datasheets telling otherwise
|- bgcolor="#eeeeee"
| 800MHz || yes || yes || yes ||
|- bgcolor="#eeeeee"
| 1067MHz || yes || yes || yes ||
|- bgcolor="#eeeeee"
| 1333MHz || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Boot paths || || || ||
|- bgcolor="#eeeeee"
| Hot reset || yes || yes || yes ||
|- bgcolor="#eeeeee"
| Resume from S3 || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: MRC cache || || || ||
|- bgcolor="#eeeeee"
| MRC cache - S3 || no || no || no ||
|- bgcolor="#eeeeee"
| MRC cache - normal boot || no || no || no ||
|- bgcolor="#6699dd"
! Menu: XMP support || || || ||
|- bgcolor="#eeeeee"
| XMP Profile 1 || yes || no || no ||
|- bgcolor="#eeeeee"
| XMP Profile 2 || yes || no || no ||
|- bgcolor="#6699dd"
! Menu: Voltage Support || || || ||
|- bgcolor="#eeeeee"
| 1.8V || yes || yes || yes || on ddr2
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: Manual Overwrites || || || ||
! Menu: Manual Overwrites || || || ||
Line 194: Line 354:
| not implemented || no || no || no ||
| not implemented || no || no || no ||
|}
|}
== X4x ==


== i945 ==
== i945 ==
Line 226: Line 385:
| single and dual channel || yes || yes || yes ||
| single and dual channel || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| Up to 4 slots || yes || yes || yes ||
| Up to 4 slots || yes || ? || ? || No such board in coreboot and a comment in raminit suggests not
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| Up to 4 ranks per channel || yes || yes || yes ||
| Up to 4 ranks per channel || yes || yes || yes ||
Line 237: Line 396:
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR2-666 (333Mhz) || yes || yes || yes ||
| DDR2-666 (333Mhz) || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Supported CAS latencies || || || ||
|- bgcolor="#eeeeee"
| CL3 || yes || yes || yes ||
|- bgcolor="#eeeeee"
| CL4 || yes || yes || yes ||
|- bgcolor="#eeeeee"
| CL5 || yes || yes || yes ||
|- bgcolor="#6699dd"
! Menu: Boot paths || || || ||
|- bgcolor="#eeeeee"
| Hot reset || yes || yes || yes ||
|- bgcolor="#eeeeee"
| Resume from S3 || yes || yes || yes ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: MRC cache || || || ||
! Menu: MRC cache || || || ||
Line 252: Line 425:
! Menu: Voltage Support || || || ||
! Menu: Voltage Support || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| 1.5V || yes || yes || yes ||
| 1.8V || yes || yes || yes ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: Manual Overwrites || || || ||
! Menu: Manual Overwrites || || || ||
Line 262: Line 435:


== Sandybridge/Ivybridge ==
== Sandybridge/Ivybridge ==
Note: If you see only half of the installed memory, there was a memory training error and the emergency fallback has been activated. Please provide raminit logs and file a bug or report it in IRC.


'''Status'''
'''Status'''
Line 304: Line 479:
| DDR3-1866 (933Mhz) || yes || yes || yes ||
| DDR3-1866 (933Mhz) || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-2133 (1066Mhz) || yes || yes || untested ||
| DDR3-2133 (1066Mhz) || yes || yes || yes ||
|- bgcolor="#eeeeee"
| DDR3-1400 (700Mhz) || yes (Ivybridge only) || yes || ? || Since Coreboot 4.6
|- bgcolor="#eeeeee"
| DDR3-1800 (900Mhz) || yes (Ivybridge only) || yes || yes || Since Coreboot 4.6
|- bgcolor="#eeeeee"
| DDR3-2000 (1000Mhz) || yes (Ivybridge only) || yes || ? || Since Coreboot 4.6
|- bgcolor="#eeeeee"
| DDR3-2200 (1100Mhz) || yes (Ivybridge only) || yes || ? || Since Coreboot 4.6
|- bgcolor="#eeeeee"
| DDR3-2400 (1200Mhz) || yes (Ivybridge only) || yes || ? || Since Coreboot 4.6
|- bgcolor="#6699dd"
! Menu: Supported CAS latencies || || || ||
|- bgcolor="#eeeee|
| CL6 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL7 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL8 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL9 || yes || yes || ? ||
|- bgcolor="#eeeeee"
| CL10 || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-1400 (700Mhz) || yes (Ivybridge only) || no || no ||
| CL11 || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-1800 (900Mhz) || yes (Ivybridge only) || no || no ||
| CL12 || yes || yes || ? || Since Coreboot 4.6
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-2000 (1000Mhz) || yes (Ivybridge only) || no || no ||
| CL13 || yes || yes || yes || Since Coreboot 4.6
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-2200 (1100Mhz) || yes (Ivybridge only) || no || no ||
| CL14 || yes || yes || ? || Since Coreboot 4.6
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| DDR3-2400 (1200Mhz) || yes (Ivybridge only) || no || no ||
| CL15 || yes || yes || ? || Since Coreboot 4.6
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: MRC cache || || || ||
! Menu: MRC cache || || || ||
Line 324: Line 521:
! Menu: XMP support || || || ||
! Menu: XMP support || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| XMP Profile 1 || yes || yes || yes - only 1.5V profiles ||
| XMP Profile 1 || yes || yes || yes || only 1.5V profiles
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| XMP Profile 2 || yes || yes || no ||
| XMP Profile 2 || yes || yes || no ||
Line 332: Line 529:
| 1.5V || yes || yes || yes ||
| 1.5V || yes || yes || yes ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| 1.35V || ? || no || no ||
| 1.35V || depends on board || no || no || needs GPIO to control voltage converter
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: Manual Overwrites || || || ||
! Menu: Manual Overwrites || || || ||
|- bgcolor="#eeeeee"
|- bgcolor="#eeeeee"
| devicetree: cfg_max_mem_clk || yes || yes || yes - limits maximum DDR frequency ||
| devicetree: cfg_max_mem_clk || yes || yes || yes - limits maximum DDR frequency ||
|- bgcolor="#eeeeee"
| Kconfig:  NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES  || yes || yes || yes - ignore DDR frequency limit set by northbridge fuse ||
|- bgcolor="#6699dd"
|- bgcolor="#6699dd"
! Menu: Overclocking || || || ||
! Menu: Overclocking || || || ||

Latest revision as of 07:30, 22 August 2017

Status page for all Intel based CPUs and MCHs

Native raminit is to replace the Intel provided closed source binary, that does initialize the memory. This binary is referenced as MRC (Memory Reference Code). Some platforms do support either MRC or native raminit, others only support one of them. In general one can summarize that DDR3 or DDR4 raminit is much more complex that DDR2 raminit, make it more difficult to provide open source and bug free raminit code.

GM45

Status

Option Supported Implemented Working Description
Native raminit yes yes yes
MRC raminit ?


Native raminit features

Option Supported Implemented Working Description
Menu: Supported channels
single and dual channel yes yes yes
Up to 4 slots yes yes yes
Up to 4 ranks per channel yes yes yes
Menu: Supported frequencies
DDR3-666 (333MHz) yes yes yes
DDR3-800 (400MHz) yes yes yes
DDR3-1066 (533Mhz) yes yes yes
DDR2-800 (400MHz) yes no no
DDR2-666 (333MHz) yes no no
Menu: Supported CAS latencies
CL6 yes yes ?
CL7 yes yes ?
CL8 yes yes ?
CL9 yes yes ?
CL10 yes yes ?
CL11 yes yes ?
CL12 yes no
CL13 yes no
CL14 yes no
CL15 yes no
CL16 yes no
Menu: Boot paths
Hot reset yes yes yes
Resume from S3 yes yes yes
Menu: MRC cache
MRC cache - S3 yes no
MRC cache - normal yes no
Menu: XMP support
XMP Profile 1 yes no no
XMP Profile 2 yes no no
Menu: Voltage Support
1.5V yes yes yes
Menu: Manual Overwrites
Menu: Overclocking
not implemented no no no

Nehalem

Status

Option Supported Implemented Working Description
Native raminit yes yes yes
MRC raminit ? ? ?

Native raminit features

Option Supported Implemented Working Description
Menu: Supported channels
single and dual channel yes yes yes
Up to 4 slots yes yes yes
Up to 4 ranks per channel yes yes yes
Menu: Supported frequencies
DDR3-800 yes yes ?
DDR3-1066 yes yes ?
DDR3-1333 yes yes ?
Menu: Supported CAS latencies
CL6 yes yes ?
CL7 yes yes ?
CL8 yes yes ?
CL9 yes yes ?
CL10 yes yes ?
CL11 yes yes ?
CL12 yes no
CL13 yes no
CL14 yes no
CL15 yes no
CL16 yes no
Menu: MRC cache
MRC cache - S3 yes yes yes
MRC cache - normal boot yes yes yes
Menu: XMP support
XMP Profile 1 yes no no
XMP Profile 2 yes no no
Menu: Voltage Support
1.5V yes yes yes
1.35V ? no no
Menu: Manual Overwrites
Menu: Overclocking
not implemented no no no

Pineview

Status

Option Supported Implemented Working Description
Native raminit yes yes yes
MRC raminit ? ? ?

Native raminit features

Option Supported Implemented Working Description
Menu: Supported channels
single and dual channel yes yes yes
Up to 4 slots yes yes yes
Up to 4 ranks per channel yes yes yes
Menu: Supported frequencies
DDR2-666 (333Mhz) yes yes yes
DDR2-800 (400Mhz) yes yes yes
Menu: Supported CAS latencies
CL4 yes yes yes
CL5 yes yes yes
CL6 yes yes yes
Menu: Boot paths
Hot reset yes yes yes
Resume from S3 yes no no
Menu: MRC cache
MRC cache - S3 no no no
MRC cache - normal boot no no no
Menu: XMP support
XMP Profile 1 yes no no
XMP Profile 2 yes no no
Menu: Voltage Support
1.8V yes yes yes on ddr2
Menu: Manual Overwrites
Menu: Overclocking
not implemented no no no

X4x (Desktop Intel 4 series)

Status

Option Supported Implemented Working Description
Native raminit yes yes yes
MRC raminit ? ? ?

Native raminit features

Option Supported Implemented Working Description
Menu: Supported channels
single and dual channel yes yes yes
Up to 4 slots yes yes ? No such board in coreboot
Up to 4 ranks per channel yes yes yes
Menu: Supported frequencies
DDR2-533 (266Mhz) yes no no vendor bios bios supports this despite datasheets telling otherwise
DDR2-666 (333Mhz) yes yes yes
DDR2-800 (400Mhz) yes yes yes
Menu: Supported CAS latencies
CL5 yes yes yes
CL6 yes yes yes
Menu: Supported CPU, FSB
533MHz yes no no vendor bios bios supports this despite datasheets telling otherwise
800MHz yes yes yes
1067MHz yes yes yes
1333MHz yes yes yes
Menu: Boot paths
Hot reset yes yes yes
Resume from S3 yes yes yes
Menu: MRC cache
MRC cache - S3 no no no
MRC cache - normal boot no no no
Menu: XMP support
XMP Profile 1 yes no no
XMP Profile 2 yes no no
Menu: Voltage Support
1.8V yes yes yes on ddr2
Menu: Manual Overwrites
Menu: Overclocking
not implemented no no no

i945

Status

Option Supported Implemented Working Description
Native raminit yes yes yes
MRC raminit ? ? ?

Native raminit features

Option Supported Implemented Working Description
Menu: Supported channels
single and dual channel yes yes yes
Up to 4 slots yes ? ? No such board in coreboot and a comment in raminit suggests not
Up to 4 ranks per channel yes yes yes
Menu: Supported frequencies
DDR2-400 (200Mhz) yes yes yes
DDR2-533 (266Mhz) yes yes yes
DDR2-666 (333Mhz) yes yes yes
Menu: Supported CAS latencies
CL3 yes yes yes
CL4 yes yes yes
CL5 yes yes yes
Menu: Boot paths
Hot reset yes yes yes
Resume from S3 yes yes yes
Menu: MRC cache
MRC cache - S3 no no no
MRC cache - normal boot no no no
Menu: XMP support
XMP Profile 1 yes no no
XMP Profile 2 yes no no
Menu: Voltage Support
1.8V yes yes yes
Menu: Manual Overwrites
Menu: Overclocking
not implemented no no no

Sandybridge/Ivybridge

Note: If you see only half of the installed memory, there was a memory training error and the emergency fallback has been activated. Please provide raminit logs and file a bug or report it in IRC.

Status

Option Supported Implemented Working Description
Native raminit yes yes yes Native Raminit is working for most frequencies on most boards. There might be errors to fix.
MRC raminit yes yes ?

Native raminit features

Option Supported Implemented Working Description
Menu: Supported channels
single and dual channel yes yes yes
Up to 4 slots yes yes yes
Up to 4 ranks per channel yes yes yes
Menu: Supported frequencies
DDR3-1066 (533Mhz) yes yes yes
DDR3-1333 (666Mhz) yes yes yes
DDR3-1600 (800Mhz) yes yes yes
DDR3-1866 (933Mhz) yes yes yes
DDR3-2133 (1066Mhz) yes yes yes
DDR3-1400 (700Mhz) yes (Ivybridge only) yes ? Since Coreboot 4.6
DDR3-1800 (900Mhz) yes (Ivybridge only) yes yes Since Coreboot 4.6
DDR3-2000 (1000Mhz) yes (Ivybridge only) yes ? Since Coreboot 4.6
DDR3-2200 (1100Mhz) yes (Ivybridge only) yes ? Since Coreboot 4.6
DDR3-2400 (1200Mhz) yes (Ivybridge only) yes ? Since Coreboot 4.6
Menu: Supported CAS latencies
CL6 yes yes ?
CL7 yes yes ?
CL8 yes yes ?
CL9 yes yes ?
CL10 yes yes yes
CL11 yes yes yes
CL12 yes yes ? Since Coreboot 4.6
CL13 yes yes yes Since Coreboot 4.6
CL14 yes yes ? Since Coreboot 4.6
CL15 yes yes ? Since Coreboot 4.6
Menu: MRC cache
MRC cache - S3 yes yes yes
MRC cache - normal boot yes yes yes - reset on SPD CRC16 difference
Menu: XMP support
XMP Profile 1 yes yes yes only 1.5V profiles
XMP Profile 2 yes yes no
Menu: Voltage Support
1.5V yes yes yes
1.35V depends on board no no needs GPIO to control voltage converter
Menu: Manual Overwrites
devicetree: cfg_max_mem_clk yes yes yes - limits maximum DDR frequency
Kconfig: NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES yes yes yes - ignore DDR frequency limit set by northbridge fuse
Menu: Overclocking
not implemented no no no

Haswell

Option Supported Implemented Working Description
Native raminit no no no
MRC raminit yes yes yes No known issues.
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