The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
- no MRC cache (longer boot time)
- yellow USB port isn't powered in power-off state.
- S3 (Suspend to RAM) - system powers off
- Discrete GPU not supported
- DisplayPort only connected to Discrete GPU
- TPM. At the moment there is only support a basic support inside coreboot...
- Windows hung while boot
- Ultrabay SATA
- RAM module combinations of mrc: 4G+0, 0+4G, 8G+0, native: 4G+0, 8G+0
- USB ports
- Video (internal)
- ExpressCard slot (including hot-plugging)
- Gigabit LAN
- Mini-PCIe slot WLAN
- Linux (through SeaBIOS-as-payload)
- Trackpoint & Touchpad
- Fn hotkeys
- SD card slot
- Sound (integrated speakers, integrated mic, external headphones, external mic)
- Fingerprint reader
- USB WWAN
- Thermal management
- VGA output
proprietary components status
- CPU Microcode
- ME(Management Engine) => you do not have to touch it(just leave it where it is)
- GbE(Gigabit Ethernet embedded mac) => you do not have to touch it(just leave it where it is)
- The code has been merged into coreboot master
$ git clone http://review.coreboot.org/p/coreboot
T520 has a ST / numonyx M25PX64VG 8 MiB flash chip in a VDFPN8 package.
Next to the flash chip is a connector solder place "J100" where it is connected to.
1 N/C 2 N/C 3 /CS 4 VCC 5 MISO 6 /HOLD 7 /WP 8 CLK 9 GND 10 MOSI
Flash layout: FLREG0: 0x00000000
Flash Region 0 (Flash Descriptor): 00000000 - 00000fff
Flash Region 1 (BIOS): 00500000 - 007fffff
Flash Region 2 (Intel ME): 00003000 - 004fffff
Flash Region 3 (GbE): 00001000 - 00002fff
Flash Region 4 (Platform Data): 00fff000 - 00000fff (unused)
Vendor firmware locks the flash and so you need to flash externally (unless until someone figures out a way around it).