The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
CPU Northbridge GPU Memory
FlashChips (SPI): - 512kb (EC) - 2mb (BIOS) EC: ITE IT8518E
USB Debug Port: Tested with linux cmdline earlyprintk=dbgp,keep - works on the right front usb port. This means it's debug port 0, but linux has different enumeration. so it's debugport1 on coreboot.