Difference between revisions of "Board:lenovo/x60/Installation"

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(remove all the crap. tidy it up. The instructions were conflicting, contradictory and confusing. Not to mention, wrong.)
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{{Note|All ThinkPad X60 Series laptops work out of the box with Coreboot and Libreboot, no modifications necessary.}}
 
{{Note|All ThinkPad X60 Series laptops work out of the box with Coreboot and Libreboot, no modifications necessary.}}
  
{{Note|If you plan to use Libreboot with the T60 (FSF-Certified, cannot use proprietary blobs), it requires a ''ThinkPad T60 with Intel GPU and a 14"/15" Flexview 1400x1050 SXGA+ display'' (1600x1200, 2048x1536, and 14" 1400x1050 panels are also known to work. Widescreen T60s have not been tested).
+
=== Back up the original proprietary firmware ===
 
 
The libreboot project lists compatible screens at the time of writing, using changeset 5345 from review.coreboot.org: [http://libreboot.org/docs/index.html#supported_t60_list list of known-working lcd panels]
 
 
 
Thus, Libreboot users will have to make a custom FrankenPad; either by replacing the motherboard with an Intel board; or the screen and the inverter with an SXGA+ display, at great expense.}}
 
 
 
{{Warning|The vast majority of ThinkPad T60/T60p laptops require [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p proprietary VGABIOS blobs] for the display to work (see the bullets for more information). '''Do not forget to build Coreboot with these blobs, or your machine will be BRICKED!'''
 
 
 
* '''ThinkPad T60/T60p laptops with a 4:3 1024x768 XGA, or 16:10 Widescreen LCD''' [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p must extract the proprietary VGABIOS from the Lenovo BIOS, and build Coreboot with it.]
 
** ''(Libreboot Users)'' [http://libreboot.org/docs/hcl/index.html#supported_t60_list 1024z768 and 1280x800 T60 LCDs do not work with Libreboot.] You will have to replace them with a rare and expensive Flexview 15" 1400x1050 SXGA+ display; which is only compatible with 15" ThinkPad T60/T60p models.
 
* '''ThinkPad T60/T60p motherboard with an ATI GPU'''  [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p must extract the proprietary VGABIOS from the Lenovo BIOS, and build Coreboot with it.]
 
** ''(Libreboot Users)'' Needless to say, [http://libreboot.org/docs/index.html#t60_ati_intel ATI T60/T60p motherboards are NOT compatible with Libreboot,] replace the motherboard with an Intel one.}}
 
** All ThinkPad T60p and all Flexview 1400x1050 SXGA+ T60 laptops come with an ATI GPU, so you must always replace the motherboard to use Libreboot.
 
 
 
 
 
= Libreboot Flashing Procedure (Easy Method) =
 
 
 
{{Note|Libreboot is not officially part of the coreboot project. Do not contact coreboot for support; instead, contact the libreboot community.}}
 
 
 
The [http://libreboot.org/ Libreboot distribution] distributes pre-compiled ROM images along with scripts and instructions for easy flashing. Choose between these two guides:
 
 
 
* [http://libreboot.org/docs/index.html Official Libreboot Documentation] - Official documentation created by the Libreboot developers themselves.
 
** '''Note:''' If you choose to follow the Official Libreboot Documentation, make sure to follow the Lenovo BIOS Backup procedure details below.
 
* [https://github.com/bibanon/Coreboot-ThinkPads/wiki BASLQC Libreboot ThinkPad Guides] - Vastly streamlined unofficial Libreboot installation guide. Organized in a more straightforward fashion, and has a few tips and tricks for specific devices.
 
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X60 ThinkPad X60 and X60 Tablet]
 
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60 ThinkPad T60 (Intel GPU)]
 
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/Macbook-2-1 Macbook 2 1]
 
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p ThinkPad T60/T60p (ATI GPU)] - Requires proprietary VGABIOS.
 
 
 
=== Back up Official Lenovo BIOS (Libreboot) ===
 
  
 
{{Warning|It is ''STRONGLY RECOMMENDED'' to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.}}
 
{{Warning|It is ''STRONGLY RECOMMENDED'' to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.}}
 
   
 
   
# Download, extract, and build the latest [http://www.libreboot.org/docs/release.html Libreboot binaries].
+
# Download, extract, and build the latest [http://www.libreboot.org/download/ Libreboot binaries].
# From the {{ic|libreboot_bin/}} directory, enter the {{ic|flashrom/}} directory. 
+
# From the {{ic|libreboot_bin/}} directory:
#: {{ic|cd flashrom}}
 
 
# Run ''both'' of these commands to backup the BIOS to {{ic|factory.bin}} (don't panic, nothing is being installed):  
 
# Run ''both'' of these commands to backup the BIOS to {{ic|factory.bin}} (don't panic, nothing is being installed):  
#: {{ic|sudo ./flashrom_lenovobios_sst -p internal -r factory.bin}}
+
#: {{ic|sudo ./flashrom/i686/flashrom_lenovobios_sst -p internal -r factory.bin}}
#: {{ic|sudo ./flashrom_lenovobios_macronix -p internal -r factory.bin}}
+
#: {{ic|sudo ./flashrom/i686/flashrom_lenovobios_macronix -p internal -r factory.bin}}
# If a {{ic|factory.bin}} file was created in the {{ic|flashrom/}} directory, the Lenovo BIOS has been backed up successfully. If not, try the commands again. Copy this dump to a safe place.
+
# This will have created a file called "factory.bin", which is the contents of the flash chip while it had the original "BIOS" firmware. Back this up to a safe place (it can be useful for potential reverse engineering work, or for other testing).
# Return to the {{ic|libreboot_bin/}} directory. 
+
# The source code for this version of flashrom can also be found on the libreboot website. It is a patched flashrom executable, to work around security restrictions in the original Lenovo BIOS (it will also be used for flashing, later on in this guide); the patches for it in libreboot can be found under resources/flashrom/patch/.
#: {{ic|cd ..}}
+
# There are two flash chips for the X60/T60. The instructions above simply used flashrom executables for both; one failed, and one should have succeeded. This is much easier than finding out what flash chip you have before hand (which involved elaborate hacks in flashrom, reading output, or taking apart the laptop and physically looking at the chip).
 
 
* Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X60#back-up-official-lenovo-bios BASLQC Libreboot ThinkPads - Backing up the Lenovo BIOS on the ThinkPad X60]
 
 
 
= Coreboot Flashing Procedure (Advanced) =
 
 
 
Below is a procedure that describes all the steps needed to flash Coreboot, in fine detail.
 
 
 
The Libreboot scripts have fully automated this complicated process, so these instructions have been expanded for educational purposes.
 
 
 
== Briefing ==
 
 
 
* '''Some SPI Flash chips require ''special flashrom patches''.'''
 
** Flash chips can be identified by various commands (REMS*, RDID etc.). Some of them reply with an ID for the vendor and the exact chip model; others just reply with a single byte.
 
** Unfortunately, the vendor BIOS forbids higher quality identification commands, so flashrom must be patched to use the lower quality opcodes.
 
** This type of patch will never be merged upstream, so it must be applied manually.
 
 
 
* '''The ''BUCTS register bit'' must be flipped before flashing Coreboot.'''
 
** [http://git.stuge.se/?p=bucts.git The bucts utility] can be used to flip the bit.
 
** This register bit doubles as a unique safety net that allows the vendor BIOS and Coreboot to coexist.
 
** Just unplug the CMOS battery to return to the vendor BIOS, in case Coreboot doesn't boot.
 
 
 
* '''The Coreboot ROM has to be specially patched to prevent it from overwriting the vendor BIOS.'''
 
** If the vendor BIOS gets overwritten, it would defeat the purpose of the BUCTS safety net.
 
** Just use this convenient little Bash one-liner to leave some free space at the beginning of the ROM.
 
*: {{ic|1=dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump; dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc}}
 
 
 
* '''It is important to figure out ''what type of flashchip'' is on the motherboard.'''.
 
** Early Coreboot developers had to disassemble the entire laptop just to take a peek at the flashchip. A magnifying glass is needed to read the tiny text burned on top of the chip.
 
** The Libreboot installation scripts have '''an ingenious new brute-force method''' of identifying the flashchip.
 
** First, build two patched flashrom binaries, one for SST and one for Macronix. Then try both of the binaries until you find one that works.
 
** Seems way too simple, but it's way better than ripping out the motherboard just to look at a chip.
 
 
 
== Flashrom Patch Definitions ==
 
 
 
: ''Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/BIOS-Flashchip-Identification-Method#use-flashrom-to-identify-bios-chip-experimental BASQLC Libreboot ThinkPads - BIOS Flashchip Identification Method]''
 
 
 
Flashrom must be patched to use RES SPI identification and {{ic|spi_chip_write_1}} for your flash chip, and to set the flash chip {{ic|model_id}} to the RES opcode.
 
 
 
Below are the definitions that must be patched into {{ic|flashrom/flashchips.c}} :
 
 
 
* '''SST25VF016B'''
 
** .probe - {{ic|probe_spi_res2}}
 
** .model_id - {{ic|0x41}}
 
** .write - {{ic|spi_chip_write_1}}
 
* '''MX25l1605D'''
 
** .probe - {{ic|probe_spi_res1}}
 
** .model_id - {{ic|0x14}}
 
** .write - {{ic|spi_chip_write_1}}
 
* '''Atmel ???''' (T60 Only?)
 
** Use -p internal:laptop=force_I_want_a_brick instead of -p internal, when running flashrom
 
** No patches necessary. You still need to do 2 flashing rounds, with the bucts/dd trick outlined in this guide.
 
 
 
These definitions were painstakingly discovered from excessively long and hardly informative flashchip documentation, mailing lists, and the output of flashrom. These definitions been confirmed to work after rigorous testing, [https://github.com/bibanon/Coreboot-ThinkPads/wiki/BIOS-Flashchip-Identification-Method#use-flashrom-to-identify-bios-chip-experimental See this wiki page for more information.]
 
 
 
* [http://paste.flashrom.org/view.php?id=1454 Flashrom Pastebin - Thinkpad R60 Flashrom Output] - Probing for SST SST25VF016B.RES2, 2048 kB: probe_spi_res2: id1 0xbf, id2 0x41
 
* [http://www.coreboot.org/pipermail/coreboot/2013-June/075962.html Coreboot Mailing List - Invalid OPCODE] - Allows us to infer that the model_id for {{ic|SST25VF016B}} is 0xbf
 
* [http://coreboot.org/pipermail/coreboot/2013-June/076027.html Coreboot Mailing List - Bricked Lenovo T60]
 
* [http://macbook.donderklumpen.de/coreboot/ Donderclumpen - Coreboot on Macbook 2,1]] - Found {{ic|id1 0xbf, id2 0x2541}} there, which corroborates with the inference from Peter Stuge.
 
* [http://ww1.microchip.com/downloads/en/DeviceDoc/S71271_04.pdf SST - SST25VF016B Official Datasheet]
 
 
 
== What You Need ==
 
 
 
* The [http://flashrom.org/Download#Installation_from_source flashrom source] (at least r1613 to make sure the laptops are whitelisted to work with flashrom)
 
* Flashrom patches for SST and Macronix flashchip support (provided in the next section).
 
* [http://git.stuge.se/?p=bucts.git The bucts utility].
 
* '''Dependencies''' (Debian/Ubuntu/Trisquel):
 
** '''Version Control''' - {{ic|sudo apt-get install subversion git}}
 
** '''Build Essentials''' - {{ic|sudo apt-get -y install build-essential}}
 
** '''flashrom''' - {{ic|sudo apt-get install libpci-dev pciutils zlib1g-dev libftdi-dev}}
 
** '''Coreboot''' - {{ic|sudo apt-get install libncurses-dev iasl libc6-dev bison flex git}}
 
** '''GRUB2''' (optional) - {{ic|sudo apt-get install bison libopts25 libselinux1-dev autogen m4 autoconf help2man libopts25-dev flex libfont-freetype-perl automake autotools-dev libfreetype6-dev texinfo ttf-unifont}}
 
 
 
== Patch Flashrom ==
 
 
 
: ''Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/BIOS-Flashchip-Identification-Method BASQLC Libreboot ThinkPads - Flashrom Patches]''
 
 
 
This method uses the ''brute force flashchip identification method'' used in the Libreboot flashing scripts. The idea is, if the patched flashrom can't identify the chip, it won't do anything; so why not try both patches?
 
 
 
''The most reliable method to identify the flashchip is to visually identify it; but flipping the motherboard requires complete disassembly.''
 
 
 
First, build both the SST and Macronix patches of Flashrom.
 
 
 
=== Step 1: Build Normal Flashrom ===
 
 
 
# Obtain the latest {{ic|flashrom}} source code with Subversion:
 
#: {{ic|svn co svn://flashrom.org/flashrom/trunk flashrom}}
 
# Build {{ic|flashrom</code> using the <code>make}} command.
 
#: {{ic|make}}
 
# Rename the {{ic|flashrom</code> binary to <code>flashrom_orig}} .
 
#: {{ic|mv flashrom flashrom_orig}}
 
 
 
=== Step 2: Build SST-patched Flashrom  ===
 
 
 
# Open the <code>flashchips.c</code> file in the <code>flashrom</code> source code directory.
 
# Use '''Ctrl-F''' to find the {{ic|SST25VF016B}} entry.
 
# Modify the <code>.probe</code> , <code>.model_id</code> , and <code>.write</code> definitions with the following values.
 
#* .probe - {{ic|probe_spi_res2}}
 
#* .model_id - {{ic|0x41}}
 
#* .write - {{ic|spi_chip_write_1}}
 
# The result should look something like this:
 
 
 
{{bc|1={
 
        .vendor        = "SST",
 
        .name          = "SST25VF016B",
 
        .bustype        = BUS_SPI,
 
        .manufacture_id = SST_ID,
 
        .model_id      = 0x41,
 
        .total_size    = 2048,
 
        .page_size      = 256,
 
        .feature_bits  = FEATURE_WRSR_EITHER,
 
        .tested        = TEST_OK_PREW,
 
        .probe          = probe_spi_res2,
 
        /*
 
          unimportant code statements
 
          in between, leave them alone
 
        */
 
        .write          = spi_chip_write_1,
 
        .read          = spi_chip_read,
 
        .voltage        = {2700, 3600},
 
},}}
 
 
 
# Build <code>flashrom</code> using the <code>make</code> command.
 
#: {{ic|make}}
 
# Rename the <code>flashrom</code> binary to <code>flashrom_lenovobios_sst</code> .
 
#: {{ic|mv flashrom flashrom_lenovobios_sst}}
 
 
 
=== Step 3: Build Macronix-patched Flashrom  ===
 
 
 
# Revert the changes previously made to flashchips.c
 
# Use '''Ctrl-F''' to find the {{ic|MX25L1605D}} entry.
 
# Modify the <code>.probe</code> , <code>.model_id</code> , and <code>.write</code> definitions with the following values.
 
#* .probe - {{ic|probe_spi_res1}}
 
#* .model_id - {{ic|0x14}}
 
#* .write - {{ic|spi_chip_write_1}}
 
# The result should look something like this:
 
 
 
{{bc|1={
 
        .vendor        = "Macronix",
 
        .name          = "MX25L1605D/MX25L1608D/MX25L1673E",
 
        .bustype        = BUS_SPI,
 
        .manufacture_id = MACRONIX_ID,
 
        .model_id      = 0x14,
 
        .total_size    = 2048,
 
        .page_size      = 256,
 
        .feature_bits  = FEATURE_WRSR_WREN,
 
        .tested        = TEST_OK_PREW,
 
        .probe          = probe_spi_res1,
 
        /*
 
          unimportant code statements
 
          in between, leave them alone
 
        */
 
        .write          = spi_chip_write_1,
 
        .read          = spi_chip_read, /* Fast read (0x0B), dual I/O supported */
 
        .voltage        = {2700, 3600},
 
},}}
 
 
 
# Build <code>flashrom</code> using the <code>make</code> command.
 
#: {{ic|make}}
 
# Rename the <code>flashrom</code> binary to <code>flashrom_lenovobios_macronix</code> .
 
#: {{ic|mv flashrom flashrom_lenovobios_macronix}}
 
# Revert the changes previously made to flashchips.c
 
 
 
=== Step 4: Rename the Vanilla Flashrom Binary ===
 
 
 
We renamed the untouched flashrom binary to {{ic|flashrom_orig}}, so that it wouldn't be overwritten. Now we need to restore the original name.
 
  
# Rename the <code>flashrom_orig</code> binary to <code>flashrom</code> .
+
== Video BIOS (VGA option ROM) ==
#: {{ic|mv flashrom_orig flashrom}}
 
  
== Back up Official Lenovo BIOS ==
+
On systems with Intel graphics, native graphics initialization code exists in coreboot. However, if you want to use the Intel (proprietary) Video BIOS, you should extract this from the factory.bin dump that you created earlier. If your system has ATI graphics (common on the T60), this is '''required'''.
  
{{Warning|It is ''STRONGLY RECOMMENDED'' to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.}}
+
[http://www.coreboot.org/VGA_support#RECOMMENDED:_Extracting_from_your_vendor_bios_image VGA support] page on the coreboot wiki tells you how to extract it.
 
# Enter the {{ic|flashrom/}} directory.
 
#: {{ic|cd flashrom}}
 
# Run ''both'' of these commands to backup the BIOS to {{ic|factory.bin}} (don't panic, nothing is being installed):
 
#: {{ic|sudo ./flashrom_lenovobios_sst -p internal -r factory.bin}}
 
#: {{ic|sudo ./flashrom_lenovobios_macronix -p internal -r factory.bin  -c "MX25L1605"}}
 
# If a <code>factory.bin</code> file was created in the <code>flashrom/</code> directory, the Lenovo BIOS has been backed up successfully. If not, try the commands again. Copy this dump to a safe place.
 
# Return to the {{ic|libreboot_bin/}} directory. 
 
#: {{ic|cd ..}}
 
  
* Source: [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-X60#back-up-official-lenovo-bios BASLQC Libreboot ThinkPads - Backing up the Lenovo BIOS on the ThinkPad X60]
+
Place this inside the coreboot/ directory, and in menuconfig enable it under '''Devices''' if you are using payloads other than SeaBIOS (for SeaBIOS, you should configure SeaBIOS to run it. Coreboot's default SeaBIOS configuration will use it). In either scenario, you will want to include it in the ROM image, so make sure to specify the path "vgabios.bin" (or whatever the path to your VBIOS image is) in menuconfig, making sure to enter the correct numbers for the PCI ID (get this using '''lspci -nn''').
  
== Build the Coreboot ROM ==
+
== Patch the coreboot ROM image for bucts ==
  
{{Warning|The vast majority of ThinkPad T60/T60p laptops require [https://github.com/bibanon/Coreboot-ThinkPads/wiki/ThinkPad-T60p proprietary VGABIOS blobs] for the display to work. If you forget to install them, your machine will be BRICKED!}}
+
Failure to follow this will result in a bricked laptop.
 
 
* See [http://www.coreboot.org/Build_HOWTO Build HOWTO] for how to build ROM images in coreboot.
 
** ''(optional)'' If you need to obtain and embed the VGABIOS in Coreboot (e.g. T60 with ATI GPU, text in SeaBIOS), [https://github.com/bibanon/Coreboot-ThinkPads/wiki/T60p-Extract-VGABIOS follow this procedure.]
 
** [https://github.com/bibanon/Coreboot-ThinkPads/wiki/T60p-Build-Coreboot Here is a clearer guide] which shows exactly how to build Coreboot, set up the {{ic|.config}} file, and embed the VGABIOS.
 
 
 
== Patch Coreboot ROM for bucts ==
 
 
 
The BUCTS switch provides a safety net in case Coreboot does not run the first time; just unplug the CMOS battery to return to the vendor BIOS.
 
 
 
This patch prevents the Coreboot ROM from overwriting the vendor BIOS (which would destroy the safety net). ''Choose one method:''
 
  
 
=== Method 1: One-line Patcher===
 
=== Method 1: One-line Patcher===
Line 249: Line 34:
 
#: {{ic|<nowiki>dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump; dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc</nowiki>}}
 
#: {{ic|<nowiki>dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump; dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc</nowiki>}}
  
=== Method 2: Verbose Method ===
+
 
 +
 
 +
=== BUC.TS ===
 +
 
 +
'''B'''ack'''u'''p '''C'''ontrol '''T'''op '''S'''wap.
  
 
# Copy the built {{ic|coreboot.rom</code> to the <code>flashrom}} source code directory.
 
# Copy the built {{ic|coreboot.rom</code> to the <code>flashrom}} source code directory.
Line 262: Line 51:
 
#: {{ic|<nowiki>dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s
 
#: {{ic|<nowiki>dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s
 
coreboot.rom) - 0x20000] count=64k conv=notrunc</nowiki>}}
 
coreboot.rom) - 0x20000] count=64k conv=notrunc</nowiki>}}
 +
 +
What this did was copy the upper 64KiB section of the ROM image, into the section below. This is the boot block; lenovobios prevents writing to the upper 64KiB block (by default, it prevents all other regions but a patched flashrom binary can flash those regions in software). A utility called '''bucts''' will be used later on to set the system up so that it boots from the before-final 64KiB block during the initial installation of coreboot.
 
   
 
   
 
* Source: [http://comments.gmane.org/gmane.linux.bios/69354 gmane.linux.bios Mailing List - LinuxBIOS on T60] - Peter Stuge's Method of installing Coreboot on the X60.
 
* Source: [http://comments.gmane.org/gmane.linux.bios/69354 gmane.linux.bios Mailing List - LinuxBIOS on T60] - Peter Stuge's Method of installing Coreboot on the X60.
Line 269: Line 60:
 
First, install Coreboot alongside the vendor BIOS.
 
First, install Coreboot alongside the vendor BIOS.
  
# Copy the {{ic|coreboot.rom</code> to the <code>flashrom/}} directory.
+
As before, you will be using the patched version of flashrom distributed in libreboot. The binary releases of libreboot come with both bucts and flashrom already compiled (you can also build them from source, if you like). You can also get bucts and flashrom from upstream (optional):
 +
* http://git.stuge.se/?p=bucts.git
 +
* http://flashrom.org/
 +
 
 +
The libreboot project also distributes ROM images already compiled for the X60/T60, if you prefer (for T60, please avoid these if you have either a 1024x768 screen and/or ATI graphics):
 +
 
 
# Run {{ic|su}}  to become root.
 
# Run {{ic|su}}  to become root.
# Run {{ic|bucts 1}}  
+
# You '''must''' run bucts, flipping the register so that the value is high (1) (as explained before):
 +
# Run {{ic|./bucts/i686/bucts 1}}  
 +
## It should have said '''Updated BUC.TS=1''' for the above command. If not, please do NOT continue; get help.
 
# Flash Coreboot (run both of these commands, whichever works first):
 
# Flash Coreboot (run both of these commands, whichever works first):
 
#: {{ic|sudo ./flashrom_lenovobios_sst -p internal -w coreboot.rom}}   
 
#: {{ic|sudo ./flashrom_lenovobios_sst -p internal -w coreboot.rom}}   
 
#: {{ic|sudo ./flashrom_lenovobios_macronix -p internal -w coreboot.rom}}  
 
#: {{ic|sudo ./flashrom_lenovobios_macronix -p internal -w coreboot.rom}}  
#* This will take a while, and will spit out a few errors (since half the flashchip is write protected).  
+
#* This will take a while, and will spit out a few errors (since the upper 64KiB region of the flash is write-protected).  
# Check to make sure that the errors match the following:
+
# Check to make sure that the errors match the following (example):
  
 
{{bc|    Reading old flash chip contents... done.
 
{{bc|    Reading old flash chip contents... done.
Line 297: Line 95:
 
     Your flash chip is in an unknown state.}}
 
     Your flash chip is in an unknown state.}}
  
# If the errors are an exact match, the flash was successful.
+
# If the errors are like that then, contrary to the error output, the image was flashed successfully.
#* If they don't match, '''DO NOT TURN OFF YOUR LAPTOP'''. Flash again.
+
#* If they don't match, '''DO NOT TURN OFF YOUR LAPTOP'''; get help instead.
# Power cycle the machine (i.e. a cold boot, not just a reboot). Your laptop will reboot into Coreboot.
+
# Shut down the laptop (fully shut it down, as in, turn it off), and then boot it again in a few seconds. Your laptop will boot into Coreboot.
  
{{Note|If you're using an Intel GPU, SeaBIOS will not display anything without a proprietary VGABIOS blob, but GNU/Linux should work fine after booting.}}
+
{{Note|If you're using an Intel GPU, SeaBIOS will not display anything without a proprietary VGABIOS blob, or without the free SeaVGABIOS ("coreboot linear framebuffer" in menuconfig) option ROM in SeaBIOS, but GNU/Linux should work fine in any case.}}
  
 
* Sources: [http://www.flashrom.org/pipermail/flashrom/2012-April/009124.html Peter's mail] - [http://thread.gmane.org/gmane.linux.bios/69354 Mailing List Thread 1] - [http://thread.gmane.org/gmane.linux.bios.flashrom/575 Mailing List Thread 2]
 
* Sources: [http://www.flashrom.org/pipermail/flashrom/2012-April/009124.html Peter's mail] - [http://thread.gmane.org/gmane.linux.bios/69354 Mailing List Thread 1] - [http://thread.gmane.org/gmane.linux.bios.flashrom/575 Mailing List Thread 2]
 
=== Recover from Failed Flash with Bucts ===
 
 
{{Note|If you forgot to set {{ic|bucts 1}} , forgot to install the proprietary VGABIOS blob on T60 systems with ATI GPUs or 1024x768 screens, or forgot to patch the Coreboot ROM; your laptop has been bricked, and requires hardware flashing for recovery.}}
 
 
bucts sets a register that lives on the RTC well, ie. it is powered by the same source that keeps the clock alive. Usually that's a CMOS battery on the mainboard.
 
 
# Unscrew the keyboard (check Lenovo Hardware Maintenence Manual for more info).
 
# Remove the keyboard.
 
# Unplug the CMOS battery (it's a yellow circle).
 
# Wait a few seconds, and plug it back in.
 
# Reassemble the ThinkPad.
 
# Turn the ThinkPad back on.
 
#* On the ThinkPad x60 series, bucts issues might also be solved by "discarging RTC", which is done by pressing the power button 5 times for 10 seconds.
 
 
Afterwards, the register should be reset and the system should boot into the vendor BIOS.
 
  
 
== Install Coreboot (Second Flash) ==
 
== Install Coreboot (Second Flash) ==
Line 338: Line 120:
 
If you had a bad flash you will need to use a hardware flasher to reflash the BIOS.
 
If you had a bad flash you will need to use a hardware flasher to reflash the BIOS.
  
{{Note|The BASLQC provides a more comprehensive guide to hardware-based firmware flashing below, with research on a Raspberry Pi-based hardware flasher: (Not a Coreboot project)
+
If you want something that's easy to follow, the libreboot project shows how to flash externally using a BeagleBone Black
* [https://github.com/bibanon/Coreboot-ThinkPads/wiki/X60-T60-Hardware-Flashing BASLQC Libreboot ThinkPads - Hardware-based Firmware Flashing]}}
+
* [http://libreboot.org/docs/install/x60_unbrick.html Unbricking the X60]
 
+
* [http://libreboot.org/docs/install/x60tablet_unbrick.html Unbricking the X60 Tablet]
=== Required/advised hardware and informations ===
+
* [http://libreboot.org/docs/install/t60_unbrick.html Unbricking the T60]
* [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf X60 Hardware Maintenance Manual] or [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42t7844_04.pdf T60 Hardware Maintenance Manual] for disassembling the laptop
+
* [http://libreboot.org/docs/install/bbb_setup.html How to flash using the BBB]
* An SO-8 IC clip, like the [http://www.tme.eu/en/details/pom-5250/test-clips/pomona/5250/ Pomona 5250] for instance.
 
* An external flashrom programmer
 
 
 
=== Disassembling the ThinkPad ===
 
 
 
Follow the [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42x3550_04.pdf X60 Hardware Maintenance Manual] or [http://download.lenovo.com/ibmdl/pub/pc/pccbbs/mobiles_pdf/42t7844_04.pdf T60 Hardware Maintenance Manual] to disassemble the laptop, until you can access the flash chip.
 
 
 
(photos needed)
 
 
 
* On the X60, the flash chip is on the bottom of the motherboard, under a layer of protective black tape.
 
* On the T60, the flash chip is just under the palmrest, but blocked by a magnesium frame (which you will have to remove).
 
 
 
=== Bus Pirate + SOIC Clip Configuration ===
 
 
Below is a diagram of how to plug the Bus Pirate into the SOIC Clip, with colors based on [http://dangerousprototypes.com/docs/Common_Bus_Pirate_cable_pinouts the Seeed Studio pinout.] Your cable colors may differ (such as the Sparkfun layout).
 
 
 
<pre>8765
 
----
 
|  |
 
----
 
1234</pre>
 
 
 
# CS (white)
 
# MISO (black)
 
# ''not used''
 
# GND (brown)
 
# MOSI (gray)
 
# CLK (purple)
 
# ''not used''
 
# 3.3V (red) - Depends on chip
 
 
{{Note|Make sure the pinouts are correct; otherwise, Bus Pirate will fail to detect a chip, or it will "detect" an {{ic|0x0}}  chip.}}
 
 
 
Finally, make sure that the Pomona clip makes contact with the metal wires of the chip. It can be a challenge, but keep trying.
 
 
 
=== How to supply power to the flashchip ===
 
 
There are two ways to supply power to the chip: plugging in an AC adapter (without turning it on), and using the 8th 3.3v pin.
 
 
I have found that the SST chips work best with the 8th pin, while the Macronix chips require an AC Adapter to power up.
 
 
 
Your results may vary.
 
 
 
== Reading the Flashchip with Bus Pirate ==
 
 
# Visually inspect (with a magnifying glass) the type of flashchip on the motherboard.
 
# Clip the Pomona SOIC-8 Clip onto the flashchip. Make sure that the Bus Pirate is connected to it as shown above.
 
# download and extract the Libreboot binaries, and enter the {{ic|libreboot_bin/flashrom}}  directory.
 
 
 
{{bc|cd libreboot_bin/flashrom}}
 
If it is an SST, run this command:
 
 
 
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r test.rom}}
 
If it is a Macronix, run this command:
 
 
 
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -r test.rom -c "MX25L1605D/MX25L1608D/MX25L1673E"}}
 
Next, check the sha512sum of the dump:
 
 
 
{{bc|sha512sum test.rom}}
 
Run the {{ic|flashrom}} command again to make a second dump. Then, check the sha512sum of the second dump:
 
 
 
{{bc|sha512sum test.rom}}
 
If the sha512sums match after three tries, {{ic|flashrom}} has managed to read the flashchip precisely (but not always accurately). You may try and flash Libreboot now.
 
 
 
== Flashing Libreboot with Bus Pirate ==
 
 
 
{{Note|replace <code>/path/to/libreboot.rom</code> with the location of your chosen ROM, such as <code>../bin/x60/libreboot_usqwerty.rom</code>):}}
 
 
 
If your chip is SST, run this command:
 
 
 
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w /path/to/libreboot.rom}}
 
 
 
If your chip is Macronix, run this command:
 
 
 
{{bc|1=sudo ./flashrom -p buspirate_spi:dev=/dev/ttyUSB0 -w /path/to/libreboot.rom -c "MX25L1605D/MX25L1608D/MX25L1673E" }}
 
 
 
Once that command outputs the following, the flash has completed successfully. If not, just flash again.
 
 
 
{{bc|Reading old flash chip contents... done.Erasing and writing flash chip... Erase/write done.Verifying flash... VERIFIED.}}
 
  
 
=== Howto (old) ===
 
=== Howto (old) ===
 
{{Note|The libreboot project also has picture guides showing disassembly and external flashing instructions ('''these 3 links are to the libreboot project. Contact libreboot, *not* coreboot, for support'''):
 
* [http://libreboot.org/docs/howtos/x60_unbrick.html X60/X60s unbricking guide]
 
* [http://libreboot.org/docs/howtos/x60tablet_unbrick.html X60 Tablet unbricking guide]
 
* [http://libreboot.org/docs/howtos/t60_unbrick.html T60 unbricking guide]
 
 
The libreboot guides linked above are based on the information below from the coreboot project.}}
 
  
 
0.  wire the pomona clip to a programmer that way:
 
0.  wire the pomona clip to a programmer that way:

Revision as of 19:26, 9 April 2015

These Coreboot/Libreboot flashing instructions are designed for the Lenovo X60, X60s, X60 tablet, T60 and T60p.

Note: All ThinkPad X60 Series laptops work out of the box with Coreboot and Libreboot, no modifications necessary.

Back up the original proprietary firmware

Warning: It is STRONGLY RECOMMENDED to back up the vendor BIOS; each vendor BIOS image has a unique, unrecoverable ID. Do not use another laptop's vendor BIOS image.
  1. Download, extract, and build the latest Libreboot binaries.
  2. From the libreboot_bin/ directory:
  3. Run both of these commands to backup the BIOS to factory.bin (don't panic, nothing is being installed):
    sudo ./flashrom/i686/flashrom_lenovobios_sst -p internal -r factory.bin
    sudo ./flashrom/i686/flashrom_lenovobios_macronix -p internal -r factory.bin
  4. This will have created a file called "factory.bin", which is the contents of the flash chip while it had the original "BIOS" firmware. Back this up to a safe place (it can be useful for potential reverse engineering work, or for other testing).
  5. The source code for this version of flashrom can also be found on the libreboot website. It is a patched flashrom executable, to work around security restrictions in the original Lenovo BIOS (it will also be used for flashing, later on in this guide); the patches for it in libreboot can be found under resources/flashrom/patch/.
  6. There are two flash chips for the X60/T60. The instructions above simply used flashrom executables for both; one failed, and one should have succeeded. This is much easier than finding out what flash chip you have before hand (which involved elaborate hacks in flashrom, reading output, or taking apart the laptop and physically looking at the chip).

Video BIOS (VGA option ROM)

On systems with Intel graphics, native graphics initialization code exists in coreboot. However, if you want to use the Intel (proprietary) Video BIOS, you should extract this from the factory.bin dump that you created earlier. If your system has ATI graphics (common on the T60), this is required.

VGA support page on the coreboot wiki tells you how to extract it.

Place this inside the coreboot/ directory, and in menuconfig enable it under Devices if you are using payloads other than SeaBIOS (for SeaBIOS, you should configure SeaBIOS to run it. Coreboot's default SeaBIOS configuration will use it). In either scenario, you will want to include it in the ROM image, so make sure to specify the path "vgabios.bin" (or whatever the path to your VBIOS image is) in menuconfig, making sure to enter the correct numbers for the PCI ID (get this using lspci -nn).

Patch the coreboot ROM image for bucts

Failure to follow this will result in a bricked laptop.

Method 1: One-line Patcher

  1. Place the coreboot.rom file in the current directory.
  2. Run this one-liner to patch the ROM in one command:
    dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k; dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump; dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc


BUC.TS

Backup Control Top Swap.

  1. Copy the built coreboot.rom to the flashrom source code directory.
  2. Run the dd command below to shift the first 64K of data from coreboot.rom
    dd if=coreboot.rom of=top64k.bin bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x10000] count=64k
  3. Run the dd command below to display the first 64k of coreboot.rom
    dd if=coreboot.rom bs=1 skip=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k | hexdump
  4. Verify that the complete range is filled with ff bytes before proceeding.
    The output of the dd command above must EXACTLY match the text below. If not, the coreboot image needs to be rebuilt with the second-to-last 64kbyte block unused.
    0000000 ffff ffff ffff ffff ffff ffff ffff ffff *0010000
  5. Run the dd command below:
    dd if=top64k.bin of=coreboot.rom bs=1 seek=$[$(stat -c %s coreboot.rom) - 0x20000] count=64k conv=notrunc

What this did was copy the upper 64KiB section of the ROM image, into the section below. This is the boot block; lenovobios prevents writing to the upper 64KiB block (by default, it prevents all other regions but a patched flashrom binary can flash those regions in software). A utility called bucts will be used later on to set the system up so that it boots from the before-final 64KiB block during the initial installation of coreboot.

Install Coreboot (First Flash)

First, install Coreboot alongside the vendor BIOS.

As before, you will be using the patched version of flashrom distributed in libreboot. The binary releases of libreboot come with both bucts and flashrom already compiled (you can also build them from source, if you like). You can also get bucts and flashrom from upstream (optional):

The libreboot project also distributes ROM images already compiled for the X60/T60, if you prefer (for T60, please avoid these if you have either a 1024x768 screen and/or ATI graphics):

  1. Run su to become root.
  2. You must run bucts, flipping the register so that the value is high (1) (as explained before):
  3. Run ./bucts/i686/bucts 1
    1. It should have said Updated BUC.TS=1 for the above command. If not, please do NOT continue; get help.
  4. Flash Coreboot (run both of these commands, whichever works first):
    sudo ./flashrom_lenovobios_sst -p internal -w coreboot.rom
    sudo ./flashrom_lenovobios_macronix -p internal -w coreboot.rom
    • This will take a while, and will spit out a few errors (since the upper 64KiB region of the flash is write-protected).
  5. Check to make sure that the errors match the following (example):
    Reading old flash chip contents... done.
    Erasing and writing flash chip... spi_block_erase_20 failed during command execution at address 0x0
    Reading current flash chip contents... done. Looking for another erase function.
    spi_block_erase_52 failed during command execution at address 0x0
    Reading current flash chip contents... done. Looking for another erase function.
    Transaction error!
    spi_block_erase_d8 failed during command execution at address 0x1f0000
    Reading current flash chip contents... done. Looking for another erase function.
    spi_chip_erase_60 failed during command execution
    Reading current flash chip contents... done. Looking for another erase function.
    spi_chip_erase_c7 failed during command execution
    Looking for another erase function.
    No usable erase functions left.
    FAILED!
    Uh oh. Erase/write failed. Checking if anything has changed.
    Reading current flash chip contents... done.
    Apparently at least some data has changed.
    Your flash chip is in an unknown state.
  1. If the errors are like that then, contrary to the error output, the image was flashed successfully.
    • If they don't match, DO NOT TURN OFF YOUR LAPTOP; get help instead.
  2. Shut down the laptop (fully shut it down, as in, turn it off), and then boot it again in a few seconds. Your laptop will boot into Coreboot.
Note: If you're using an Intel GPU, SeaBIOS will not display anything without a proprietary VGABIOS blob, or without the free SeaVGABIOS ("coreboot linear framebuffer" in menuconfig) option ROM in SeaBIOS, but GNU/Linux should work fine in any case.

Install Coreboot (Second Flash)

Next, flash Coreboot a second time to overwrite the vendor BIOS.

  1. Run su to become root.
  2. Enter the flashrom directory.
  3. Run ./flashrom -p internal -w coreboot.rom
    This will successfully overwrite the entire flash chip with no errors, including the last 64k that were write protected with the factory BIOS.
    If it complains about 3 different flashchips (in the case of macronix chip), do this instead:
    Run ./flashrom -p internal -w coreboot.rom -c "MX25L1605D/MX25L1608D/MX25L1673E"
  4. Run bucts 0
  5. Reboot the laptop. Coreboot has been successfully installed.

Recovery with a Hardware Firmware Flasher

If you had a bad flash you will need to use a hardware flasher to reflash the BIOS.

If you want something that's easy to follow, the libreboot project shows how to flash externally using a BeagleBone Black

Howto (old)

0. wire the pomona clip to a programmer that way:

From the #coreboot IRC Channel on FreeNode servers:

Oct 01 15:35:48 <CareBear\>     one important thing is that when you connect the clip to the X60 you should not connect all pins
[...]
Oct 01 15:36:22 <CareBear\>     only connect these pins: 1, 2, 4, 5, 6
[...]
Oct 01 15:37:21 <CareBear\>     also important: first connect charger to laptop, then connect the clip
[...]
Oct 01 17:49:41 <CareBear\>     GNUtoo-desktop : the mainboard must be powered off, but with the charger connected
[...]
Oct 01 17:50:39 <CareBear\>     um, that way there is no way anything will break
[...]
Oct 01 17:51:00 <CareBear\>     it is important not to connect 3v3 from the outside
Oct 01 17:51:39 <CareBear\>     because the correct power sequencing is not known, and if any other rail must come on before the standby 3v3 then the machine may well break when 3v3 is applied from the outside
[...]
Oct 01 17:52:48 <CareBear\>     it may also be fine - but it is unknown what happens
[...]
Oct 01 17:53:47 <CareBear\>     not supplying 3v3 from the outside is safer
Oct 01 17:54:25 <CareBear\>     and because the machine is powered off, there is no risk of the chipset accessing the flash chip

In another hand I didn't follow that and wired it without powering the mainboard(mainboard disconnected from power plug, no battery in) and with all pins and it worked...

  1. Disassemble carefully the laptop, the SO-8 chip is on the bottom of the mainboard...
  2. connect the pomona clip to the flash chip
  3. flash coreboot or the BIOS
  4. remount the laptop

See also In-System Programming

Coreboot standard configuration

  • It's now the default that when running SeaBios, that it (instead of coreboot) runs the VGA option rom.

See VGA_support for details on how to include the VGA BIOS image.

VBIOS replacement (native graphics)

The VGA option ROM (see above) is proprietary. Under devices in menuconfig, disable loading option ROM,s and enable 'Native graphics initialization'. Use the GRUB payload.

TODO: add notes here for how to patch coreboot for T60 native graphics (it's in libreboot already, or on 5345 on coreboot gerrit).

Recently tested revisions on the X60

See the most recent board-status submissions

970ad7076388b3ef98988121170df86196d493b4 coreboot-4.0-5534-g970ad70

8496c4dbec41b3a9284fc29b0dcd97fc8946223b coreboot-4.0-5045-g9bf05de

Recently tested revisions on the T60

See the most recent board-status submisssions

a172ea546992c3f6f6a99b4dbaabbdae4c959707 4.0-5611-ga172ea5

9bf05de5ab2842fc83cea8da5e9058417fc4bc24 4.0-5045-g9bf05de

Status