The wiki is being retired!
Documentation is now handled by the same processes we use for code: Add something to the Documentation/ directory in the coreboot repo, and it will be rendered to https://doc.coreboot.org/. Contributions welcome!
This page describes how you can build a coreboot image for your specific mainboard.
- gcc / g++ (gcc-multilib is ideal, makes building payloads a lot easier)
- cmake (if using clang/llvm)
- ncurses-dev (for make menuconfig)
- doxygen (for generating/viewing documentation)
- iasl (for targets with ACPI support)
- gdb (for better debugging facilities on some targets)
- flex and bison (for regenerating parsers)
Building a payload
First you need to download the source code for the payload of your choice and build it.
Instructions for building the various payloads are not covered on this page, please see Payloads and the wiki page for the respective payload for details.
The result of this step should be an ELF file (e.g. filo.elf, or coreinfo.elf) which you can use with coreboot (see below).
Most beginners want to use the default SeaBIOS payload. It runs Option ROMs, is able to discover boot devices and provides a very simple boot menu.
There's no need to build SeaBIOS by hand, it is done by coreboot.
First, get the latest coreboot version from our git repository:
$ git clone http://review.coreboot.org/p/coreboot $ cd coreboot $ git submodule update --init --checkout
The last step is important! It checks out a sub-repository in the 3rdparty directory.
In the coreboot directory you can configure the build-time options of coreboot:
$ make menuconfig
$ make nconfig (easier to navigate, uses ncurses)
In that menu (which may look familiar, as other projects such as the Linux kernel or busybox use the same system), select at least the following options:
- Enter the Mainboard menu.
- In Mainboard vendor select the vendor of your board.
- In Mainboard model select your exact mainboard name.
- In ROM chip size select the exact size of the flash ROM chip you want to flash the coreboot image on. (see output of
More detailed example (generic) configuration (tweak accordingly): (note that this assumes presence of native graphics initialization on the given board, which is not universally available in coreboot)
General setup / Expert mode = enable General / Use CMOS for configuration values = enable Mainboard / Mainboard vendor = Name of manufacturer Mainboard / Mainboard model = Model name Mainboard / ROM chip size = size of flash chip Chipset / Include CPU microcode in CBFS = Do not include microcode updates (NOTE: you probably want to enable it on some systems) Devices / Use native graphics initialization = enable (NOTE: not available on all systems) Display / Keep VESA framebuffer = disable (disable for text-mode graphics, enable for coreboot vesa framebuffer) Generic Drivers / USB 2.0 EHCI debug dongle support = Enable Generic Drivers / Enable early (pre-RAM) usbdebug = Enable Generic Drivers / Type of dongle = Net20DC or compatible Generic Drivers / Digitizer = Present Console / USB dongle console output = enable Payload / Add a payload = An ELF executable payload (change if you want a different payload) Payload / Payload path and filename = grub.elf (assumes building GRUB manually. Change this if you want a different payload)
Now go back into Devices (only do this if you didn't enable native graphics initialization; NOTE: instructions for adding a vbios option rom are not mentioned in the above instructions):
Devices / Run VGA Option ROMs = disable Devices / Run Option ROMs on PCI devices = disable
For Intel boards you have to provide files coreboot can't generate by itself:
Please have a look at Binary situation for a full overview. The files have to be extracted from your vendor bios.
- Enter the Chipset menu
- Do the following based on which blobs you have:
- Untick Build with a fake IFD (descriptor.bin)
- Tick Add gigabit ethernet firmware (gbe.bin)
- Tick Add Intel Management Engine firmware (me.bin)
For AMD boards you have to provide files coreboot can't generate by itself:
Choose the payload
Here's the full list of supported Payloads.
By default, the SeaBIOS payload will be downloaded and built during the coreboot build process.
If you want to use another payload (ELF for example):
- Enter the Payload menu.
- Set the Add a payload option to An ELF executable payload.
- Then, specify the file name and path to your payload file (which you built before).
VGA support is required for payloads such as GRUB or elf-memtest86+-5.01.
It isn't required for operating systems such as GNU/Linux as it initializes the graphic card by itself.
On some platforms there's support for native gfx init. A VGA BIOS isn't required.
You also need to build crossgcc (highly recommended because distributions patch gcc in ways that introduce bugs when building coreboot):
$ make crossgcc
Or alternatively to build with more than one thread, invoke the cross compiler build script directly (in this example eight threads):
$ util/crossgcc/buildgcc -j 8
In case something fails, try to search for the relevant log (
find . -name '*.log' | xargs grep Error) and examine last few lines of it.
That's the bare minimum. Feel free to adjust the other settings to your needs (see Coreboot Options for the full list), then exit menuconfig and build the coreboot image:
The file build/coreboot.rom is your final coreboot image you can flash onto a ROM chip or add payloads to with cbfstool.
Compiling with Clang/LLVM
We have been working on building coreboot with clang/llvm and it basically works. Remaining issues can be reported upstream and then block this meta bug here:
The default and recommended flow is still to use crossgcc.
Make sure you really have all the requirements installed!
With certain versions of the gcc/ld toolchain shipped in some Linux distributions, it's possible that you'll see the following error when building coreboot:
src/arch/x86/coreboot_ram.ld:129 cannot move location counter backwards
This is a known bug in those versions of the toolchain. Before sending a complaint message to our mailing list, please try to switch to our reference cross-compilation toolkit then recompile the sources. To switch to the cross-compiler just run
$ make crossgcc
Then remove the .xcompile file and retry the compilation process:
$ rm .xcompile $ make
If you want to contribute a patch or report an issue about coreboot, you will need to set up your environment for full development.
You must run make crossgcc and rebuild coreboot before reporting an issue or contributing a patch.
To get set up to submit a patch please run make gitconfig, then register with gerrit.