Difference between revisions of "Developer Manual"

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m (Fixed the location of files mentioned.)
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## Some CPUs enable their on-chip cache to be used temporarily as a scratch RAM (stack), e.g. '''cpu/amd/model_lx/cache_as_ram.inc'''.
## Some CPUs enable their on-chip cache to be used temporarily as a scratch RAM (stack), e.g. '''cpu/amd/model_lx/cache_as_ram.inc'''.
# The final '''mainboardinit''' fragment is mainboard-specific, in C, called '''romstage.c'''. For non-cache-as-RAM targets, it is compiled with '''romcc'''. It includes and uses other C-code fragments for:
# The final '''mainboardinit''' fragment is mainboard-specific, in C, called '''romstage.c'''. For non-cache-as-RAM targets, it is compiled with '''romcc'''. It includes and uses other C-code fragments for:
## Initializing MSRs, MTTRs, APIC.
## Initializing MSRs, MTRRs, APIC.
## Setting up the southbridge minimally ("early setup").
## Setting up the southbridge minimally ("early setup").
## Setting up Super I/O serial.
## Setting up Super I/O serial.

Revision as of 13:25, 16 May 2011