Difference between revisions of "Developer Manual"
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(Update location of FPU enabling code) |
(Change location of code to enable sse) |
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| Line 38: | Line 38: | ||
# execution continues with various <code>mainboardinit</code> fragments: | # execution continues with various <code>mainboardinit</code> fragments: | ||
## <code>__fpu_start</code> from cpu/x86/enable_fpu.inc | ## <code>__fpu_start</code> from cpu/x86/enable_fpu.inc | ||
## <code>(unlabeled)</code> from cpu/x86 | ## <code>(unlabeled)</code> from cpu/x86/enable_sse.inc | ||
## some CPUs enable their on-chip cache to be used temporarily as a scratch RAM (stack), e.g. cpu/amd/model_lx/cache_as_ram.inc | ## some CPUs enable their on-chip cache to be used temporarily as a scratch RAM (stack), e.g. cpu/amd/model_lx/cache_as_ram.inc | ||
# the final <code>mainboardinit</code> fragment is mainboard-specific, in 'C', called romstage.c. For non-cache-as-RAM targets, it is compiled with 'romcc'. It includes and uses other C-code fragments for: | # the final <code>mainboardinit</code> fragment is mainboard-specific, in 'C', called romstage.c. For non-cache-as-RAM targets, it is compiled with 'romcc'. It includes and uses other C-code fragments for: | ||