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  • ...TS]] runs all tests with RS232 logging disabled. In the event that a test boot fails, the REACTS will automatically rebuild, reflash, and retest the same ...have differing ideas about the contents of a data structure) can sometimes boot when the RS232 console is enabled but not when it is is disabled (or vice v ...
    1 KB (174 words) - 21:19, 10 November 2015
  • into two parts could speed up the development. One part is a bootloader, one part is an application. == firmware boot up == ...
    2 KB (318 words) - 00:46, 25 August 2015
  • !Speed |Cannot boot (works fine with proprietary BIOS). ...
    2 KB (314 words) - 07:49, 29 August 2017
  • ...ol to do a simple build test, and the default binary produced may well not boot if flashed to the system. ...to your system and telling abuild to use it with the '''-y''' option will speed things up a bit: ...
    4 KB (630 words) - 08:16, 8 December 2014
  • In your '''boot/grub/menu.lst''' add the following: serial '''--unit=0''' --speed='''115200''' ...
    6 KB (981 words) - 19:00, 13 May 2018
  • * Boot from onboard compact flash * 1/2 speed baud rate problem resolved ...
    9 KB (1,597 words) - 23:08, 5 April 2007
  • The system won't boot without this two files, that need to be included into the coreboot rom. ..._comments = might be unstable with Native Raminit (depends on GPU and PCIe speed) ...
    3 KB (526 words) - 17:35, 28 November 2017
  • ...y of the BeagleBone black. This would force the BeagleBone Black to always boot from the memory you inserted. 2) Pressing and holding every time the 'User Boot' button. This is the button next to the big, regular USB port. ...
    10 KB (1,671 words) - 00:23, 29 July 2017
  • A sample boot log from this board is available [http://www.coreboot.org/pipermail/coreboo == Boot speed == ...
    11 KB (1,525 words) - 23:22, 18 January 2014
  • coreboot requires a [[Payloads|Payload]] to boot an operating system. If you want to boot from the network, you will need to use [http://www.etherboot.org Etherboot] ...
    12 KB (1,759 words) - 23:22, 18 January 2014
  • When developing, you will, at some point, have flashed code that cannot boot your mainboard. ...mers are not always necessary. Use your mainboard as a programmer instead. Boot up with a known-good image, then unplug the (DIP32, PLCC32, or DIP8) ROM ch ...
    11 KB (1,729 words) - 17:10, 22 August 2017
  • ..._comments = tested with a Radeon HD2600, but only video output after linux boot |Powersave_comments = By default the CPU fan rotates at maximum speed. See the fancontrol attachment below on how to get it adjust automatically ...
    5 KB (855 words) - 12:13, 20 May 2015
  • if [ -f "$x/boot/grub/grub.cfg" ] ; then configfile /boot/grub/grub.cfg ...
    13 KB (1,987 words) - 17:24, 8 January 2017
  • General setup ---> [*] Create a table of timestamps collected during boot * Remove 3Gbps SATA speed limit [http://review.coreboot.org/4762 link] ...
    9 KB (1,390 words) - 17:32, 17 February 2015
  • coreboot requires a [[Payloads|payload]] to boot an operating system. If you want to boot from the network, you will need to use [http://www.etherboot.org Etherboot] ...
    10 KB (1,522 words) - 23:22, 18 January 2014
  • coreboot requires a [[Payloads|payload]] to boot an operating system. If you want to boot from the network, you will need to use [[Etherboot]]. ...
    10 KB (1,428 words) - 03:56, 19 January 2014
  • ...utput is enabled. It is very useful for debugging, but also slows down the boot process a lot. If you don't need serial debug or have no idea how to use it |CPU_comments = Core 2 Duo up to 1067MHz FSB. Pentium 4-like CPUs don't boot. ...
    7 KB (1,178 words) - 20:25, 20 August 2017
  • Aside from pre-sales configuration (display, processor speed, optional components) it looks like every X60 variant uses the same motherb |Onboard_SD_comments = Works in GNU/Linux but fails to boot form it in SeaBIOS ...
    10 KB (1,607 words) - 11:28, 5 July 2017
  • ...utput is enabled. It is very useful for debugging, but also slows down the boot process a lot. If you don't need serial debug or have no idea how to use it ...can be worked around by powering up the board normally (even if it doesn't boot) and then shutting it down by holding the power button for 5 seconds (or by ...
    9 KB (1,418 words) - 16:00, 9 May 2017
  • on the mainboard at boot time. The payload is included in the flash rom along # Speeding up the boot ...
    24 KB (4,080 words) - 23:23, 18 January 2014
  • LnkCap: Port #4, Speed 2.5GT/s, Width x1, ASPM L0s L1, Latency L0 <64ns, L1 <1us LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- ...
    23 KB (2,764 words) - 23:06, 21 June 2009
  • on the mainboard at boot time. The payload is included in the flash rom along # Speeding up the boot ...
    26 KB (4,494 words) - 23:22, 18 January 2014
  • ..._VGA_comments = VGA support in LinuxBIOS works fine (e.g. for displaying a boot logo), for console/X11 you need a special kernel console and Xorg driver. ...' or '''SST 39SF020A''' or '''MX 29F002NT''' PLCC32 256kiB flash memory to boot (in a socket) ...
    14 KB (2,140 words) - 23:21, 18 January 2014
  • # After first boot, coreboot tables are in place and can be changed with the '''lxbios''' util ...we only mention '''FILO''' and '''Etherboot'''. These two will allow us to boot a Linux OS from local disk (IDE or SATA). ...
    18 KB (2,926 words) - 23:22, 18 January 2014
  • The on-board PCMCIA and CF sockets work. coreboot can boot from CF (the stock BIOS can't). [http://www.linuxbios.org/pipermail/linuxbi on the mainboard at boot time. The payload is included in the flash rom along ...
    31 KB (5,497 words) - 03:50, 19 January 2014
  • * CPU speed throttling * boot laptop and enjoy coreboot! ...
    5 KB (749 words) - 13:39, 31 December 2017
  • ...for testing experimental Coreboot builds, which may or may not be able to boot properly. * Flashing speed could be improved. Now reading 1 MByte takes ~70 sec, flash & verify takes ...
    5 KB (793 words) - 14:22, 2 April 2013
  • ...lf firmware=rtl_nic/rtl8168d-2.fw latency=0 link=no multicast=yes port=MII speed=10Mbit/s configuration: driver=hub slots=5 speed=12Mbit/s ...
    49 KB (5,467 words) - 01:09, 29 November 2015
  • ...ensor readouts are off, and the pwm polarity seems to be inverted, but fan speed can be set. ...ote) If you install an AMD AM3/AM2+ CPU on AM2 motherboard, the system bus speed will downgrade from HT3.0(5200 MT/s) to HT1.0 (2000 MT/s); however, the fre ...
    31 KB (4,898 words) - 08:37, 30 August 2017
  • Boot the legacy BIOS, and use [[VGA_support]] chapter .... But read [[SeaBIOS]] for how to add payloads to SeaBIOS and set SeaBIOS' boot order to run your payload. ...
    9 KB (1,445 words) - 12:10, 2 May 2017
  • LnkCap: Port #3, Speed 2.5GT/s, Width x2, ASPM L0s, Latency L0 <512ns, L1 <4us LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- ...
    64 KB (8,594 words) - 19:43, 5 October 2008
  • Boot from CD is supported Selectable boot is supported ...
    58 KB (8,251 words) - 19:49, 5 October 2008
  • ..._VGA_comments = VGA support in LinuxBIOS works fine (e.g. for displaying a boot logo), for console/X11 you need a special kernel console and Xorg driver. * '''Pm29F002T''' DIL32 256kiB Flash memory to boot ...
    10 KB (1,462 words) - 23:21, 18 January 2014
  • LnkCap: Port #1, Speed 5GT/s, Width x1, ASPM L0s L1, Exit Latency L0s <512ns, L1 <64us LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive+ BWMgmt- ABWMgmt- ...
    92 KB (9,722 words) - 02:31, 29 November 2015
  • ...b|right|ASUS KGPE-D16 on the development stand at Raptor Engineering.<p>To boot with a second CPU package installed, the 2nd EPS12V connector MUST be conne .... Failing to clear the CMOS will typically result in odd hangs during the boot process. ...
    19 KB (3,122 words) - 16:54, 10 May 2018
  • ...Mbit) flash part and a DoC flash part. This is an ideal situation. We can boot a fairly complex LinuxBIOS from the FLASH part, as it is at least 8 times l ...it hard to get it all right. Actual SDRAM parameters such as CAS latency, speed, etc. are maintained on a Serial EEPROM (SEEPROM) on the SDRAM module. The ...
    12 KB (2,131 words) - 17:36, 16 November 2008
  • ...station: Bonn Hbf) is reachable by high-speed train (ICE), and other high-speed train stations (Cologne, Siegburg) are reasonably close (30 minutes). http: ...ivial drivers for storage, filesystems, network, etc. which may be used to boot the machine. ...
    17 KB (2,573 words) - 15:18, 11 May 2017
  • the speed to 115200 Bps None, 8, 1 and boot up the IP530. ...of a distro that uses the serial console for its installation. The kernel boot customation, must be something like this "apci=off console=ttyS0,115200n8" ...
    16 KB (2,587 words) - 23:22, 18 January 2014
  • |SATA_comments = SATA mode (IDE/AHCI) and speed (3Gbps/6Gbps) can be changed through an NVRAM setting ...keyboards. When using SeaBIOS, the keyboard might not be detected on every boot (likely some timing issue). Tianocore can only initialize the keyboard if i ...
    63 KB (8,660 words) - 16:06, 10 May 2018