# Copyright (C) 2022 - 2025 Advanced Micro Devices, Inc. All rights reserved.

#
#
#

#
#  AMD open Silicon Initialization Library
#

#
#
#

#
# Platform Configuration Settings
#

#
# The following items are placed in the platform address map by the
#

#
# porting Engineer. These locations must be propagated into openSIL.
#

#
#
#
CONFIG_PLAT_APOB_ADDRESS=0x9F00000
CONFIG_PSP_BIOS_BIN_BASE=0x9B00000
CONFIG_PSP_BIOS_BIN_SIZE=0x300000
CONFIG_PLAT_CPU_MICROCODE_LOCATION=0x003FFF00
CONFIG_PLAT_NUMBER_SOCKETS=1
# end of Platform Configuration Settings

#
# AMD Processor(s) Selection
#

#
#  This is the list of supported AMD processors for openSIL. Please
#

#
#  select the Socket and processor designed into your motherboard.
#

#
#
#
CONFIG_MKT_SEG_CLIENT=y
# CONFIG_MKT_SEG_SERVER is not set
# CONFIG_MKT_SEG_EMBEDDED is not set
CONFIG_PLAT_MARKET_SEGMENT_NAME="Client"
CONFIG_SKT_TYPE_AM5=y
CONFIG_PLAT_SOCKET_TYPE_NAME="AM5"
CONFIG_SOC_F19M70=y
# end of AMD Processor(s) Selection

#
# AMD Silicon Feature Settings
#

#
#
#

#
#  The available silicon devices and features are dependent upon
#

#
#  which AMD processor(s) have been selected for inclusion into
#

#
#  the platform build.
#

#
#
#
CONFIG_HAVE_CCX_ZEN4=y

#
# Compute Core Complex (CCX) Device
#

#
#
#

#
#  The CCX device controls the quantity and operation of the
#

#
#  compute core in the system
#

#
#
#

#
# CCX Common Configuration
#

#
#
#

#
# CCX Common - Controls that are common to all versions of IP: CCX
#

#
#
#
# CONFIG_CHOICE_COMPATIBILITYMODE is not set
# CONFIG_CHOICE_XAPIC_MODE is not set
# CONFIG_CHOICE_X2APIC_MODE is not set
CONFIG_CHOICE_APIC_AUTO=y
CONFIG_CCX_APIC_MODE=0xFF
CONFIG_CHOICE_DOWNCORE_AUTO=y
# CONFIG_CHOICE_DOWNCORE_7_7 is not set
# CONFIG_CHOICE_DOWNCORE_6_6 is not set
# CONFIG_CHOICE_DOWNCORE_5_5 is not set
# CONFIG_CHOICE_DOWNCORE_4_4 is not set
# CONFIG_CHOICE_DOWNCORE_3_3 is not set
# CONFIG_CHOICE_DOWNCORE_2_2 is not set
# CONFIG_CHOICE_DOWNCORE_1_1 is not set
# CONFIG_CHOICE_DOWNCORE_6_5 is not set
# CONFIG_CHOICE_DOWNCORE_7_0 is not set
# CONFIG_CHOICE_DOWNCORE_6_0 is not set
# CONFIG_CHOICE_DOWNCORE_5_0 is not set
# CONFIG_CHOICE_DOWNCORE_4_0 is not set
# CONFIG_CHOICE_DOWNCORE_3_0 is not set
# CONFIG_CHOICE_DOWNCORE_2_0 is not set
# CONFIG_CHOICE_DOWNCORE_1_0 is not set
CONFIG_CCX_DOWNCORE_MODE=0
CONFIG_CHOICE_NUMCCD_AUTO=y
# CONFIG_CHOICE_NUMCCD_11_CCDS is not set
# CONFIG_CHOICE_NUMCCD_10_CCDS is not set
# CONFIG_CHOICE_NUMCCD_9_CCDS is not set
# CONFIG_CHOICE_NUMCCD_8_CCDS is not set
# CONFIG_CHOICE_NUMCCD_7_CCDS is not set
# CONFIG_CHOICE_NUMCCD_6_CCDS is not set
# CONFIG_CHOICE_NUMCCD_5_CCDS is not set
# CONFIG_CHOICE_NUMCCD_4_CCDS is not set
# CONFIG_CHOICE_NUMCCD_3_CCDS is not set
# CONFIG_CHOICE_NUMCCD_2_CCDS is not set
# CONFIG_CHOICE_NUMCCD_1_CCD is not set
CONFIG_CCX_CCD_MODE=0
CONFIG_CCX_SMT_MODE=1
CONFIG_CCX_CSTATE_ENABLE=1
CONFIG_CCX_CSTATE_IO_ADDR=0x0813
CONFIG_CCX_CSTATE_CC6_ENABLE=1
CONFIG_CCX_CPB_ENABLE=1
CONFIG_CCX_SMEE_ENABLE=0
CONFIG_CCX_HMKEE_ENABLE=0
CONFIG_CCX_SVM_ENABLE=1
CONFIG_CCX_SVM_LOCK=1
CONFIG_CCX_RMSS_ENABLE=0
CONFIG_CCX_P0_SETTING=2
CONFIG_CCX_P0_FREQ=0
CONFIG_CCX_AUTO_FREQ=0xFFFFFFFF
CONFIG_CCX_P0_VID32=0
CONFIG_CCX_AUTO_VID=0xFFFFFFFF
# end of CCX Common Configuration

#
# CCX Zen4 Configuration
#

#
#
#

#
# CCX Zen4 Configuration
#

#
#
#
CONFIG_CCX_ZEN4_VARINT=5
# end of CCX Zen4 Configuration
# end of Compute Core Complex (CCX) Device

CONFIG_HAVE_NBIO_PHX=y

#
# Northbridge IO (NBIO) Device
#

#
#
#

#
#  The NBIO device comprises multiple IPs that are related to
#

#
#  high-speed IO resource, primarily the PCI Express
#

#
#  and internal graphics subsystems
#

#
#
#

#
#
#

#
# IP: NBIO PHX is used by F19M70 **
#

#
# IOAPIC settings
#

#
#
#

#
#  IO Advanced Programmable Interrupt Controller IOAPIC settings
#

#
#
#
CONFIG_IOAPIC_MMIO_ADDRESS_RESERVED_ENABLE=1
CONFIG_IOAPIC_ID_PREDEFINE_EN=0
CONFIG_IOAPIC_ID_BASE=0xF1
# end of IOAPIC settings

#
# NBIO PMM - General
#

#
#
#

#
#  NBIO Post Memory Manager (PMM) - General
#

#
#
#
CONFIG_CHOICE_AUTO=y
# CONFIG_CHOICE_DISABLED is not set
CONFIG_NBIO_GLOBAL_CG_OVERRIDE=0x0f
CONFIG_SSTUNL_CLK_GATING=1
CONFIG_NBIF_MGCG_CLK_GATING=1
CONFIG_NBIF_MGCG_HYSTERESIS=0
CONFIG_SYSHUB_MGCG_CLK_GATING=0
CONFIG_SYSHUB_MGCG_HYSTERESIS=0
CONFIG_IOHC_CLK_GATING_SUPPORT=1
CONFIG_NTB_CLOCK_GATING_ENABLE=1
CONFIG_IOHC_PG_ENABLE=1
CONFIG_IOHC_NONPCI_BAR_INIT_SMU=1
CONFIG_IOHC_NONPCI_BAR_INIT_DBG=0
CONFIG_IOHC_NONPCI_BAR_INIT_FAST_REG=0
CONFIG_IOHC_NONPCI_BAR_INIT_FAST_REGCTL=0
# end of NBIO PMM - General

#
# NBIO common Options
#

#
#
#

#
#  NBIO common Options
#

#
#
#
CONFIG_IOMMU_SUPPORT=1
CONFIG_IOMMU_L1_CLOCK_GATING_EN=1
CONFIG_IOMMU_L2_CLOCK_GATING_EN=1
CONFIG_IOMMU_AVIC_SUPPORT=0
CONFIG_IOMMU_MMIO_ADDRESS_RESERVED_ENABLE=1
CONFIG_PCIE_ECRC_ENABLEMENT=1
CONFIG_AUTO_SPEED_CHANGE_EN=0
CONFIG_PCIE_ARI_SUPPORT=1
CONFIG_RX_MARGIN_PERSISTENCE_MODE=1
# end of NBIO common Options

#
# Advanced Error Reporting
#

#
#
#

#
#  Advanced Error Reporting
#

#
#
#
CONFIG_AER_ENABLE=1
CONFIG_ACS_ENABLE=1
CONFIG_PCIE_LTR_ENABLE=1
CONFIG_TPH_COMPLETER_ENABLE=1
CONFIG_SRIOV_EN_DEV0F1=0
CONFIG_ARI_EN_DEV0F1=0
CONFIG_AER_EN_DEV0F1=0
CONFIG_ACS_EN_DEV0F1=0
CONFIG_ATS_EN_DEV0F1=0
CONFIG_PASID_EN_DEV0F1=0
CONFIG_RTR_EN_DEV0F1=0
CONFIG_PRI_EN_DEV0F1=0
CONFIG_ATC_ENABLE=0
CONFIG_ACS_EN_RCC_DEV0=0
CONFIG_AER_EN_RCC_DEV0=0
CONFIG_ACS_SOURCE_VAL_STRAP5=1
CONFIG_ACS_TRANSLATIONAL_BLOCKING_STRAP5=1
CONFIG_ACS_P2P_REQ_STRAP5=1
CONFIG_ACS_P2P_COMP_STRAP5=1
CONFIG_ACS_UPSTREAM_FWD_STRAP5=1
CONFIG_ACS_P2P_EGRESS_STRAP5=0
CONFIG_ACS_DIRECT_TRANSLATED_STRAP5=1
CONFIG_ACS_SSID_EN_STRAP5=1
CONFIG_DLF_EN_STRAP1=1
CONFIG_PHY_16GT_STRAP1=1
CONFIG_MARGIN_EN_STRAP1=1
CONFIG_PRI_EN_PAGE_REQ=1
CONFIG_PRI_RESET_PAGE_REQ=1
CONFIG_ACS_SOURCE_VAL=1
CONFIG_ACS_TRANSLATIONAL_BLOCKING=0
CONFIG_ACS_P2P_REQ=1
CONFIG_ACS_P2P_COMP=1
CONFIG_ACS_UPSTREAM_FWD=1
CONFIG_ACS_P2P_EGRESS=0
CONFIG_AMD_MASK_DPC_CAPABILITY=0
# end of Advanced Error Reporting

# CONFIG_CHOICE_ENABLE_PCIE_SPEEDCTRL is not set
# CONFIG_CHOICE_LIMIT_TO_GEN4 is not set
# CONFIG_CHOICE_LIMIT_TO_GEN5 is not set
CONFIG_CHOICE_PCIE_SPEEDCTRL_AUTO=y
CONFIG_PCIE_SPEED_CONTROL=0x0F
CONFIG_PWR_EN_DEV0F1=0
CONFIG_TLP_PREFIX_SETTING=0
CONFIG_RCC_DEV0_EXTENDED_FMT_SUPPORTED=0
CONFIG_DLF_CAP_EN_V2=15
CONFIG_DL_FEX_EN_V2=15
CONFIG_PRE_CODE_REQUEST_ENABLE=0
CONFIG_ADVERTISE_EQ_TO_HIGH_RATE_SUPPORT=0
CONFIG_FABRIC_SDCI=0
CONFIG_ESM_EN_ALL_ROOT_PORTS=0
CONFIG_SEV_SNP_SUPPORT=0
# end of Northbridge IO (NBIO) Device

CONFIG_HAVE_MPIO_PHX=y

#
#
#

#
# The MPIO IP controls the microprocessor for NBIO
#

#
# firmware/management
#

#
#
#

#
#
#

#
# IP MPIO Common - Controls that are common to all versions of the IP: MPIO
#
CONFIG_MPIO_CLOCKGATING_ENABLE=1
CONFIG_MPIO_TIMINGCTRL_ENABLE=0
CONFIG_PCIE_LINK_RECEIVER_DETECT_TIMEOUT=0
CONFIG_PCIE_LINK_RESET_TO_TRAINING_TIMEOUT=0
CONFIG_PCIE_LINK_L0_STATE_TIMEOUT=0
CONFIG_MPIO_EXACT_MATCH_ENABLE=0
CONFIG_MPIO_PHY_VALID=1
CONFIG_MPIO_PHY_PROGRAMMING=1
CONFIG_MPIO_SKIP_PSP_MSG=1
# CONFIG_CHOICE_SAVE_RESTORE_MODE_FULL is not set
# CONFIG_CHOICE_SAVE_RESTORE_MODE_SELECT is not set
# CONFIG_CHOICE_SAVE_RESTORE_MODE_HYBRID is not set
# CONFIG_CHOICE_SAVE_RESTORE_MODE_UNKNOWN is not set
CONFIG_CHOICE_SAVE_RESTORE_MODE_DEFAULT=y
CONFIG_MPIO_SAVE_RESTORE_MODE=0xFF
CONFIG_CHOICE_ENABLE_PCIE_POLLING=y
# CONFIG_CHOICE_USE_HARDWARE_DEFAULT is not set
# CONFIG_CHOICE_PCIE_POLLING_AUTO is not set
CONFIG_MPIO_ALLOW_PCIE_POLLING=0x00

#
# MPIO SRIS Configurations
#

#
# The items in this sub-menu are used for configuration of various
#

#
# PCIe Separate Reference Clock with Independent Speed (SRIS)
#

#
# options used by the MPIO IP.
#

#
#
#
# CONFIG_CHOICE_PCIE_SRIS_ENABLE is not set
# CONFIG_CHOICE_PCIE_SRIS_DISABLE is not set
CONFIG_CHOICE_PCIE_SRIS_AUTO=y
CONFIG_MPIO_PCIE_SRIS_CONTROL=0xFF
CONFIG_CHOICE_PCIE_SRIS_SKIP_INTERVAL_0=y
# CONFIG_CHOICE_PCIE_SRIS_SKIP_INTERVAL_1 is not set
# CONFIG_CHOICE_PCIE_SRIS_SKIP_INTERVAL_2 is not set
# CONFIG_CHOICE_PCIE_SRIS_SKIP_INTERVAL_3 is not set
CONFIG_MPIO_PCIE_SRIS_SKIP_INTERVAL=0x00
CONFIG_MPIO_SRIS_SKIP_INTERVAL_SELECT=1
CONFIG_MPIO_SRIS_CONFIG_TYPE=0
# CONFIG_CHOICE_SRIS_AUTO_DETECT_MODE_DISABLED is not set
# CONFIG_CHOICE_SRIS_AUTO_DETECT_MODE_ENABLED is not set
CONFIG_CHOICE_SRIS_AUTO_DETECT_MODE_AUTO=y
CONFIG_MPIO_SRIS_AUTO_DETECT_MODE=0x0F
CONFIG_MPIO_SRIS_AUTODETECT_FACTOR=0
CONFIG_CHOICE_SRIS_SKP_TRANSMISSION_UNSUPPORTED=y
# CONFIG_CHOICE_SRIS_SKP_TRANSMISSION_2_5_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_TRANSMISSION_2_5_TO_5_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_TRANSMISSION_2_5_TO_8_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_TRANSMISSION_2_5_TO_16_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_TRANSMISSION_2_5_TO_32_GT_PER_S is not set
CONFIG_MPIO_PCIE_SRIS_SKP_TRANSMISSION_CONTROL=0x00
CONFIG_CHOICE_SRIS_SKP_RECEPTION_UNSUPPORTED=y
# CONFIG_CHOICE_SRIS_SKP_RECEPTION_2_5_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_RECEPTION_2_5_TO_5_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_RECEPTION_2_5_TO_8_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_RECEPTION_2_5_TO_16_GT_PER_S is not set
# CONFIG_CHOICE_SRIS_SKP_RECEPTION_2_5_TO_32_GT_PER_S is not set
CONFIG_MPIO_PCIE_SRIS_SKP_RECEPTION_CONTROL=0x00
# end of MPIO SRIS Configurations

CONFIG_MPIO_CXL_PORT_CONTROL=1
CONFIG_MPIO_CXL_CORRECTABLE_ERROR_LOGGING=1
CONFIG_MPIO_CXL_UNCORRECTABLE_ERROR_LOGGING=1
CONFIG_MPIO_ADVANCED_ERROR_REPORTING_ENABLE=1
CONFIG_MPIO_PCIE_MULTICAST_ENABLE=0
CONFIG_MPIO_RECEIVE_ERROR_ENABLE=0
CONFIG_MPIO_EARLY_BMC_LINK_TRAIN_ENABLE=1
CONFIG_CHOICE_SOCKET_NUM_0=y
# CONFIG_CHOICE_SOCKET_NUM_1 is not set
# CONFIG_CHOICE_SOCKET_BMC_EARLY_TRAIN_UNSUPPORTED is not set
CONFIG_MPIO_EARLY_BMC_LINK_SOCKET=0x00
CONFIG_MPIO_EARLY_BMC_LINK_LANE=134
CONFIG_CHOICE_LANE_0_TO_31=y
# CONFIG_CHOICE_LANE_32_TO_63 is not set
# CONFIG_CHOICE_LANE_64_TO_95 is not set
# CONFIG_CHOICE_LANE_96_TO_127 is not set
# CONFIG_CHOICE_DIE_BMC_EARLY_TRAIN_UNSUPPORTED is not set
CONFIG_MPIO_EARLY_BMC_LINK_DIE=0x00
CONFIG_MPIO_SURPRISE_DOWN_ENABLE=1
CONFIG_MPIO_PCIE_LINK_TRAINING_SPEED=0
CONFIG_MPIO_RX_MARGIN_ENABLE=1
CONFIG_MPIO_PCIE_CV_TEST_CONFIG=1
CONFIG_MPIO_PCIE_ARI_SUPPORT=1
CONFIG_MPIO_TOGGLE_NBIO_TO_SC=0
CONFIG_MPIO_TOGGLE_NBIO_IGNORE_CTO_ERROR=1

#
# MPIO SSID Settings
#

#
# The items in this sub-menu are used for configuration of various
#

#
# SSIDs used by the MPIO IP. The SSIDs are used by the PCIE
#

#
# interface to configure register settings for different platforms
#

#
# after MPIO initialization.
#

#
#
#
CONFIG_NBIO_CONTROLLER_SSID=0x00000000
CONFIG_IOMMU_CONTROLLER_SSID=0x00000000
CONFIG_PSP_CCP_CONTROLLER_SSID=0x00000000
CONFIG_NTB_CCP_CONTROLLER_SSID=0x00000000
CONFIG_NBIF0_CONTROLLER_SSID=0x00000000
CONFIG_NTB_CONTROLLER_SSID=0x00000000
# end of MPIO SSID Settings

CONFIG_PCIE_SUBSYSTEM_DEVICE_ID=0
CONFIG_PCIE_SUBSYSTEM_VENDOR_ID=0
CONFIG_MPIO_GPP_ATOMIC_OPS=1
CONFIG_MPIO_GPFXATOMIC_OPS=1
CONFIG_MPIO_EDB_ERROR_REPORTING_ENABLE=0
CONFIG_MPIO_OPN_SPARE=0
CONFIG_AMD_PRE_SIL_CONTROL0=0
CONFIG_AMD_PRE_SIL_CONTROL1=0
CONFIG_MPIO_ANCILLARY_DATA_SUPPORT_ENABLE=0
CONFIG_MPIO_AFTER_RESET_DELAY=0
CONFIG_MPIO_EARLY_LINK_TRAINING_ENABLE=0
# CONFIG_CHOICE_HIDE_UNUSED_PORTS is not set
# CONFIG_CHOICE_EXPOSE_UNUSED_PORTS is not set
CONFIG_CHOICE_USE_PLATFORM_CONFIG_DEFAULT=y
CONFIG_MPIO_EXPOSE_UNUSED_PCIE_PORTS=0xFF
CONFIG_CHOICE_NO_LINK_SPEED_LIMIT=y
# CONFIG_CHOICE_PCIE_LIMIT_TO_GEN1 is not set
# CONFIG_CHOICE_PCIE_LIMIT_TO_GEN2 is not set
# CONFIG_CHOICE_PCIE_LIMIT_TO_GEN3 is not set
# CONFIG_CHOICE_PCIE_LIMIT_TO_GEN4 is not set
# CONFIG_CHOICE_PCIE_LIMIT_TO_GEN5 is not set
CONFIG_MPIO_MAX_PCIE_LINK_SPEED=0
CONFIG_PCIE_LINK_COMPLIANCE_MODE_ENABLE=1
CONFIG_MPIO_MCTP_SUPPORT_ENABLE=0
CONFIG_SBR_BROKEN_LANE_AVOIDANCE_ENABLE=1
CONFIG_AUTO_FULL_MARGINING_SUPPORT_ENABLE=1
CONFIG_GEN3_PCIE_PRESET_MASK=0xFFFFFFFF
CONFIG_GEN4_PCIE_PRESET_MASK=0xFFFFFFFF
CONFIG_GEN5_PCIE_PRESET_MASK=0xFFFFFFFF
# CONFIG_CHOICE_ACTIVE_STATE_PWR_MGMT_DISABLED is not set
# CONFIG_CHOICE_ACTIVE_STATE_PWR_MGMT_L0 is not set
# CONFIG_CHOICE_ACTIVE_STATE_PWR_MGMT_L1 is not set
# CONFIG_CHOICE_ACTIVE_STATE_PWR_MGMT_L0SL1 is not set
CONFIG_CHOICE_ACTIVE_STATE_PWR_MGMT_AUTO=y
CONFIG_PCIE_LINK_ACTIVE_STATE_PWR_MGMT=0xFF
CONFIG_MCTP_MASTER_PCI_ADDR_SEGMENT=0
CONFIG_MCTP_MASTER_PCI_ADDR=0
# CONFIG_CHOICE_PRESENCE_DETECT_USING_OR is not set
# CONFIG_CHOICE_PRESENCE_DETECT_USING_AND is not set
CONFIG_CHOICE_PRESENCE_DETECT_AUTO=y
CONFIG_MPIO_HOT_PLUG_PRESENCE_DETECTION_MODE=0xFF
# CONFIG_CHOICE_MAX_PAYLOAD_SIZE_128 is not set
# CONFIG_CHOICE_MAX_PAYLOAD_SIZE_256 is not set
# CONFIG_CHOICE_MAX_PAYLOAD_SIZE_512 is not set
# CONFIG_CHOICE_MAX_PAYLOAD_SIZE_1024 is not set
# CONFIG_CHOICE_MAX_PAYLOAD_SIZE_2048 is not set
# CONFIG_CHOICE_MAX_PAYLOAD_SIZE_4096 is not set
CONFIG_CHOICE_MAX_PAYLOAD_SIZE_DEFAULT=y
CONFIG_PCIE_HOTPLUG_PORT_MAX_PAYLOAD_SIZE=0xFF
CONFIG_MPIO_HOTPLUG_UMB_SUPPORT_ENABLE=1
CONFIG_LINK_DISABLE_AT_POWER_OFF_DELAY=0x00
CONFIG_MPIO_ENABLE_2SPC_GEN4=0
CONFIG_MPIO_NON_PEIE_COMPLIANT_SUPPORT=1
CONFIG_MPIO_SLT_MODE_ENABLE=0
CONFIG_MPIO_FIFO_RD_PTR_OFFSET=0xEC
CONFIG_MPIO_SDCI_ENABLE=1
CONFIG_MPIO_DATA_OBJ_EXCHANGE_ENABLE=1
CONFIG_MPIO_SFI_FEATURES_ENABLE=0
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P0 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P1 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P2 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P3 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P4 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P5 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P6 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P7 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P8 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P9 is not set
# CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_P10 is not set
CONFIG_CHOICE_GEN3_UPSTREAM_PRESET_DEFAULT=y
CONFIG_MPIO_GEN3_UPSTREAM_PRESET=0xFF
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P0 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P1 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P2 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P3 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P4 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P5 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P6 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P7 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P8 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P9 is not set
# CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_P10 is not set
CONFIG_CHOICE_GEN3_DOWNSTREAM_PRESET_DEFAULT=y
CONFIG_MPIO_GEN3_DOWNSTREAM_PRESET=0xFF
CONFIG_MPIO_GEN3_PRESET_MASK_CONFIG=0xFF
CONFIG_MPIO_GEN3_PCIE_LC_MASK_CONTROL_DEFAULT=0x00000000
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P0 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P1 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P2 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P3 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P4 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P5 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P6 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P7 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P8 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P9 is not set
# CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_P10 is not set
CONFIG_CHOICE_GEN4_UPSTREAM_PRESET_DEFAULT=y
CONFIG_MPIO_GEN4_UPSTREAM_PRESET=0xFF
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P0 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P1 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P2 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P3 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P4 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P5 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P6 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P7 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P8 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P9 is not set
# CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_P10 is not set
CONFIG_CHOICE_GEN4_DOWNSTREAM_PRESET_DEFAULT=y
CONFIG_MPIO_GEN4_DOWNSTREAM_PRESET=0xFF
CONFIG_MPIO_GEN4_PRESET_MASK_CONFIG=0xFF
CONFIG_MPIO_GEN4_PCIE_LC_MASK_CONTROL_DEFAULT=0x00000000
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P0 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P1 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P2 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P3 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P4 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P5 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P6 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P7 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P8 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P9 is not set
# CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_P10 is not set
CONFIG_CHOICE_GEN5_UPSTREAM_PRESET_DEFAULT=y
CONFIG_MPIO_GEN5_UPSTREAM_PRESET=0xFF
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P0 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P1 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P2 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P3 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P4 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P5 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P6 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P7 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P8 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P9 is not set
# CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_P10 is not set
CONFIG_CHOICE_GEN5_DOWNSTREAM_PRESET_DEFAULT=y
CONFIG_MPIO_GEN5_DOWNSTREAM_PRESET=0xFF
CONFIG_MPIO_GEN5_PRESET_MASK_CONFIG=0xFF
CONFIG_MPIO_GEN5_PCIE_LC_MASK_CONTROL_DEFAULT=0x00000000
CONFIG_MPIO_DLF_CAP_ENABLE_V2=15
CONFIG_MPIO_DLF_EX_ENABLE_V2=15
CONFIG_MPIO_PCIE_TBT_SUPPORT_ENABLE=1
CONFIG_MPIO_CFG_ACS_ENABLE=1
CONFIG_PCIE_ECRC_ENABLE=0

#
#
#

#
# IP MPIO Phx - Controls that are specific to Phx: MPIO
#
CONFIG_CHOICE_PSPP_DISABLED=y
# CONFIG_CHOICE_PERFORMANCE_MODE is not set
# CONFIG_CHOICE_BALANCED_MODE is not set
# CONFIG_CHOICE_POWER_SAVING_MODE is not set
CONFIG_MPIO_PSPP_MODE=0x00
CONFIG_NBIF_RC_SSID=0x00000000
CONFIG_GNB_IGPU_SSID=0x00000000
CONFIG_GNB_IGPU_AUDIO_SSID=0x00000000
CONFIG_MPIO_ACP_CONTROLLER_ENABLE=1
CONFIG_MPIO_SENSOR_HUB_ENABLE=1
CONFIG_MPIO_HD_AUDIO_DEV_ENABLE=1
CONFIG_MPIO_ACP_SSID=0x00000000
CONFIG_MPIO_LOOPBACK_CONTROL=1
# end of MPIO

CONFIG_HAVE_SDCI_PHX=y

#
# IP SDCI Common - Controls that are common to all versions of the IP: SDCI
#
CONFIG_SDCI_SMART_DATA_CACHE_INJECTION_ENABLE=1
# end of Smart Data Cache Injection (SDCI)

CONFIG_HAVE_FCH_TACOMA=y

#
# FCH Device
#

#
#
#

#
# The FCH is a bridge device under which many of the
#

#
# legacy and traditional components of a PC are located.
#

#
#
#

#
#  - - Under Construction - -
#

#
# FCH-AB System Bus interface for FCH
#

#
#
#

#
#  The AB block is the system bus interface for the sub-components
#

#
#  located in the FCH. These include clock gating, reset and
#

#
#  DMA control options.
#

#
#
#
CONFIG_FCH_ALINK_CLK_GATING=1
CONFIG_FCH_BLINK_CLK_GATING=1
CONFIG_FCH_AB_CLK_GATING=1
CONFIG_FCH_SLOW_BCLOCK=1
CONFIG_FCH_RESET_SYNC_FLOOD=0
CONFIG_FCH_DMA_SIZE=1
CONFIG_FCH_MEM_PWR_SAVING=1
CONFIG_FCH_SDP_PWR_SAVING=1
CONFIG_FCH_SDP_CLK_GATING=1
CONFIG_FCH_XDMA_LIMIT_SIZE=0
CONFIG_FCH_XDMA_PWR_SAVING=0
CONFIG_FCH_XDMA_NPR_COUNT=0
CONFIG_FCH_XDMA_ORDER_DIS=0
CONFIG_FCH_SDP_BYPASS_PACK=0
CONFIG_FCH_SDP_INTERLEAVING=0
# end of FCH-AB System Bus interface for FCH

#
# FCH-ACPI, Power and Misc controls
#

#
#
#

#
#  The HwAcpi component provides controls for ACPI related items,
#

#
#  System power options and various platform controls.
#

#
#
#
CONFIG_SPREAD_SPECTRUM=1
CONFIG_CHOICE_PWR_STAY_OFF=y
# CONFIG_CHOICE_PWR_ON_UNIT is not set
# CONFIG_CHOICE_PWR_RESTORE is not set
CONFIG_POWER_FAIL_RETURN_STATE=0
CONFIG_CHOICE_STRESS_DISABLE=y
# CONFIG_CHOICE_USE_KBD_RESET is not set
# CONFIG_CHOICE_SOFT_RESET is not set
# CONFIG_CHOICE_HARD_RESET is not set
CONFIG_STRESS_RESET_MODE=0
CONFIG_CLEAR_THRMTRIP_STATUS=0
CONFIG_ENABLE_BOOT_TIMER=0
CONFIG_BOOT_TIMER_RESET=0
CONFIG_TOGGLE_ALL_PWRGOOD=0
CONFIG_RELEASE_SPD_CTL_BMC=1
CONFIG_DIMM_TELEMETRY=0
# end of FCH-ACPI, Power and Misc controls

#
# FCH-ISA Bus interface for FCH
#

#
#
#

#
#  The ISA bus is a legacy system bus for devices
#

#
#  such as: LPC, SPI, TPM.
#

#
#
#

#
# LPC Bus Configurations
#
CONFIG_LPC_BUS_ENABLE=1
# end of LPC Bus Configurations

#
# SPI Bus Configurations
#
# CONFIG_CHOICE_IGNORE_STDSPEED is not set
# CONFIG_CHOICE_66MHZ_STD is not set
# CONFIG_CHOICE_50MHZ_STD is not set
CONFIG_CHOICE_33MHZ_STD=y
# CONFIG_CHOICE_22MHZ_STD is not set
# CONFIG_CHOICE_16_5MHZ_STD is not set
# CONFIG_CHOICE_4MHZ_STD is not set
# CONFIG_CHOICE_800KHZ_STD is not set
# CONFIG_CHOICE_100KHZ_STD is not set
CONFIG_SPI_STD_SPEED=2
CONFIG_CHOICE_IGNORE_WRTSPEED=y
# CONFIG_CHOICE_66MHZ_WRT is not set
# CONFIG_CHOICE_50MHZ_WRT is not set
# CONFIG_CHOICE_33MHZ_WRT is not set
# CONFIG_CHOICE_22MHZ_WRT is not set
# CONFIG_CHOICE_16_5MHZ_WRT is not set
# CONFIG_CHOICE_4MHZ_WRT is not set
# CONFIG_CHOICE_800KHZ_WRT is not set
# CONFIG_CHOICE_100KHZ_WRT is not set
CONFIG_SPI_WRT_SPEED=0
CONFIG_CHOICE_IGNORE_TPMSPEED=y
# CONFIG_CHOICE_66MHZ_TPM is not set
# CONFIG_CHOICE_50MHZ_TPM is not set
# CONFIG_CHOICE_33MHZ_TPM is not set
# CONFIG_CHOICE_22MHZ_TPM is not set
# CONFIG_CHOICE_16_5MHZ_TPM is not set
# CONFIG_CHOICE_4MHZ_TPM is not set
# CONFIG_CHOICE_800KHZ_TPM is not set
# CONFIG_CHOICE_100KHZ_TPM is not set
CONFIG_SPI_TPM_SPEED=0
# end of SPI Bus Configurations
# end of FCH-ISA Bus interface for FCH
# end of FCH Device
# end of AMD Silicon Feature Settings

#
# Show All Configs
#
# CONFIG_HAVE_ALL_YES is not set
# end of Show All Configs

# CONFIG_HAVE_EXAMPLE is not set
