## SPDX-License-Identifier: GPL-2.0-only

config BOARD_GOOGLE_CALYPSO_COMMON
	def_bool n
	select COMMON_CBFS_SPI_WRAPPER
	# FIXME: keep ADB for development phase
	select GBB_FLAG_ENABLE_ADB if VBOOT
	select MAINBOARD_HAS_CHROMEOS
	select SOC_QUALCOMM_PCIE_ASYNCHRONOUS_INIT
	select SPI_FLASH
	select SPI_FLASH_FORCE_4_BYTE_ADDR_MODE
	select SPI_FLASH_INCLUDE_ALL_DRIVERS

config BOARD_GOOGLE_BASEBOARD_CALYPSO
	def_bool n
	select BOARD_GOOGLE_CALYPSO_COMMON

config BOARD_GOOGLE_MODEL_MENSA
	def_bool n
	select BOARD_GOOGLE_BASEBOARD_CALYPSO
	select BOARD_ROMSIZE_KB_32768
	select EC_GOOGLE_CHROMEEC_BATTERY_SOC_DYNAMIC
	select EC_GOOGLE_CHROMEEC_LED_CONTROL
	select MAINBOARD_HAS_CHROME_EC
	select MAINBOARD_HAS_GOOGLE_TPM

config BOARD_GOOGLE_MENSA
	select BOARD_GOOGLE_MODEL_MENSA
	select DAP_USE_SMB1
	select HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
	select MAINBOARD_HAS_FINGERPRINT_VIA_USB
	select SOC_QUALCOMM_CALYPSO

config BOARD_GOOGLE_C1NV
	select BOARD_GOOGLE_MODEL_MENSA
	select MAINBOARD_HAS_FINGERPRINT_VIA_USB
	select SOC_QUALCOMM_CALYPSO

config BOARD_GOOGLE_MODEL_CALYPSO
	def_bool n
	select BOARD_GOOGLE_BASEBOARD_CALYPSO
	select BOARD_ROMSIZE_KB_65536
	select MISSING_BOARD_RESET
	select SOC_QUALCOMM_CDT

config BOARD_GOOGLE_CALYPSO
	select BOARD_GOOGLE_MODEL_CALYPSO
	select MAINBOARD_HAS_FINGERPRINT_VIA_USB
	select SOC_QUALCOMM_CALYPSO

if BOARD_GOOGLE_CALYPSO_COMMON

config MAINBOARD_DIR
	default "google/calypso"

config MAINBOARD_HAS_FINGERPRINT_VIA_SPI
	bool
	default n
	help
	  Enable this option if your mainboard's fingerprint reader
	  is connected via the SPI interface.

config MAINBOARD_HAS_FINGERPRINT_VIA_USB
	bool
	default n
	help
	  Enable this option if your mainboard's fingerprint reader
	  is connected via the USB interface.

config MAINBOARD_HAS_FINGERPRINT
	bool
	default y if MAINBOARD_HAS_FINGERPRINT_VIA_SPI || MAINBOARD_HAS_FINGERPRINT_VIA_USB
	help
	  Enable this option if your mainboard is equipped with an onboard
	  fingerprint reader. This could be connected via SPI or USB.

config HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
	bool
	default n
	help
	  Enable this option to allow source and sink modes on the debug access port.

config DAP_SMB_SLAVE_ID
	depends on HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
	hex
	default 0x09 if DAP_USE_SMB1
	default 0x0a if DAP_USE_SMB2
	default 0x0b if DAP_USE_SMB3
	help
	  The Slave ID for the Debug Access Port communication.

config DAP_USE_SMB1
	depends on HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
	bool
	help
	  Select this to use SMB1 for DAP.

config DAP_USE_SMB2
	depends on HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
	bool
	help
	  Select this to use SMB2 for DAP.

config DAP_USE_SMB3
	depends on HAVE_DEBUG_ACCESS_PORT_SOURCE_SINK
	bool
	help
	  Select this to use SMB3 for DAP.

config MAINBOARD_HAS_GOOGLE_TPM
	bool
	default n
	select I2C_TPM
	select MAINBOARD_HAS_TPM2
	select TPM_GOOGLE_TI50
	help
	  Enable this option if your mainboard is equipped with Google TPM aka GSC.

config MAINBOARD_HAS_CHROME_EC
	bool
	default n
	select EC_GOOGLE_CHROMEEC
	select EC_GOOGLE_CHROMEEC_RTC
	select EC_GOOGLE_CHROMEEC_SPI
	select EC_GOOGLE_CHROMEEC_SWITCHES if VBOOT
	select RTC
	help
	  Enable this option if your mainboard is equipped with Chrome EC.

config MAINBOARD_VENDOR
	string
	default "Google"

config VBOOT
	select VBOOT_ALWAYS_ENABLE_DISPLAY
	select VBOOT_LID_SWITCH if MAINBOARD_HAS_CHROME_EC
	select VBOOT_NO_BOARD_SUPPORT if !MAINBOARD_HAS_CHROME_EC
	select VBOOT_VBNV_FLASH

##########################################################
#### Update below when adding a new derivative board. ####
##########################################################

config MAINBOARD_PART_NUMBER
	default "Calypso" if BOARD_GOOGLE_CALYPSO
	default "Mensa" if BOARD_GOOGLE_MENSA
	default "C1nv" if BOARD_GOOGLE_C1NV

config DRIVER_TPM_I2C_BUS
	depends on I2C_TPM
	hex
	default 0x01 # QUP0_SE1

config DRIVER_TPM_I2C_ADDR
	depends on I2C_TPM
	default 0x50

config EC_GOOGLE_CHROMEEC_SPI_BUS
	depends on EC_GOOGLE_CHROMEEC
	hex
	default 0x16 # QUP2_SE6

config MAINBOARD_GPIO_PIN_FOR_GSC_AP_INTERRUPT
	depends on TPM_GOOGLE_TI50
	int
	default 23
	help
	  This option specifies the GPIO pin number on the mainboard that is
	  used for the interrupt line from the Google Security Chip (GSC) to the
	  Application Processor (AP).

config FMDFILE
	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if MAINBOARD_HAS_GOOGLE_TPM
	default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-nogsc.fmd"

endif # BOARD_GOOGLE_CALYPSO_COMMON
