Bug Summary

File:home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime/SmmMsrHandler.c
Warning:line 39, column 3
Value stored to 'SmmCpuState' is never read

Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-unknown-linux-gnu -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name SmmMsrHandler.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model pic -pic-level 2 -fhalf-no-semantic-interposition -fno-jump-tables -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/build/StmPkg/Core/Runtime -resource-dir /opt/xgcc/lib/clang/17 -include PcdData.h -D COREBOOT32 -D RELEASE -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/EDKII/BaseTools/Source/C/Include/X64 -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/EdkII/MdePkg/Include -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/EdkII/MdePkg/Include/X64 -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Include -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Include/x64 -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime/../Init -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime/. -internal-isystem /opt/xgcc/lib/clang/17/include -internal-isystem /usr/local/include -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/13/../../../../x86_64-linux-gnu/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -source-date-epoch 1714465709 -Os -fdebug-compilation-dir=/home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/build/StmPkg/Core/Runtime -ferror-limit 19 -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -analyzer-max-loop 10 -analyzer-output=plist-html -faddrsig -o /cb-build/coreboot_scanbuild.0/PURISM_LIBREM15_V4_STM-scanbuildtmp/2024-05-02-081243-2232343-1/report-x0PRrX.plist -x c /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime/SmmMsrHandler.c
1/** @file
2 SMM MSR handler
3
4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13**/
14
15#include "StmRuntime.h"
16#include "PeStm.h"
17
18/**
19
20 This function is RDMSR handler for SMM.
21
22 @param Index CPU index
23
24**/
25VOIDvoid
26SmmReadMsrHandler (
27 IN UINT32 Index
28 )
29{
30 UINT64 Data64;
31 UINT32 MsrIndex;
32 X86_REGISTER *Reg;
33 STM_RSC_MSR_DESC *MsrDesc;
34 STM_RSC_MSR_DESC LocalMsrDesc;
35 STM_SMM_CPU_STATE *SmmCpuState;
36 UINT32 VmType = SMI_HANDLER0;
37 BOOLEAN Result;
38
39 SmmCpuState = mGuestContextCommonSmi.GuestContextPerCpu[Index].SmmCpuState;
Value stored to 'SmmCpuState' is never read
40 Reg = &mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Register;
41 MsrIndex = ReadUnaligned32 ((UINT32 *)&Reg->Rcx);
42
43 MsrDesc = GetStmResourceMsr (mHostContextCommon.MleProtectedResource.Base, MsrIndex);
44 if ((MsrDesc != NULL((void *) 0)) && (MsrDesc->ReadMask != 0)) {
45 DEBUG ((EFI_D_ERROR, "RDMSR (%x) violation!\n", MsrIndex))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "RDMSR (%x) violation!\n"
, MsrIndex); } } while (((BOOLEAN)(0==1)));
46 AddEventLogForResource (EvtHandledProtectionException, (STM_RSC *)MsrDesc);
47 SmmExceptionHandler (Index);
48 CpuDeadLoop ();
49 }
50
51 MsrDesc = GetStmResourceMsr ((STM_RSC *)(UINTN)mGuestContextCommonSmm[VmType].BiosHwResourceRequirementsPtr, MsrIndex);
52 if ((MsrDesc == NULL((void *) 0)) || (MsrDesc->ReadMask == 0) || (MsrDesc->KernelModeProcessing == 0)) {
53 ZeroMem (&LocalMsrDesc, sizeof(LocalMsrDesc));
54 LocalMsrDesc.Hdr.RscType = MACHINE_SPECIFIC_REG4;
55 LocalMsrDesc.Hdr.Length = sizeof(LocalMsrDesc);
56 LocalMsrDesc.MsrIndex = MsrIndex;
57 LocalMsrDesc.ReadMask = (UINT64)-1;
58 LocalMsrDesc.WriteMask = 0;
59 AddEventLogForResource (EvtBiosAccessToUnclaimedResource, (STM_RSC *)&LocalMsrDesc);
60 }
61
62// DEBUG ((EFI_D_INFO, "!!!ReadMsrHandler!!!\n"));
63
64 switch (MsrIndex) {
65 case IA32_EFER_MSR_INDEX0xC0000080:
66 Data64 = mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer;
67 break;
68
69 case IA32_SYSENTER_CS_MSR_INDEX0x174:
70 Data64 = (UINT64)VmRead32 (VMCS_32_GUEST_IA32_SYSENTER_CS_INDEX0x482A);
71 break;
72 case IA32_SYSENTER_ESP_MSR_INDEX0x175:
73 Data64 = (UINT64)VmReadN (VMCS_N_GUEST_IA32_SYSENTER_ESP_INDEX0x6824);
74 break;
75 case IA32_SYSENTER_EIP_MSR_INDEX0x176:
76 Data64 = (UINT64)VmReadN (VMCS_N_GUEST_IA32_SYSENTER_EIP_INDEX0x6826);
77 break;
78
79 case IA32_FS_BASE_MSR_INDEX0xC0000100:
80 Data64 = (UINT64)VmReadN (VMCS_N_GUEST_FS_BASE_INDEX0x680E);
81 break;
82 case IA32_GS_BASE_MSR_INDEX0xC0000101:
83 Data64 = (UINT64)VmReadN (VMCS_N_GUEST_GS_BASE_INDEX0x6810);
84 break;
85
86 default:
87 Result = StmPlatformLibMsrRead (MsrIndex, &Data64);
88 if (Result) {
89 break;
90 }
91 //
92 // For rest one, we need pass back to BIOS
93 //
94
95 Data64 = AsmReadMsr64 (MsrIndex);
96 //
97 // Need mask read item
98 //
99 MsrDesc = GetStmResourceMsr (mHostContextCommon.MleProtectedResource.Base, MsrIndex);
100 if (MsrDesc != NULL((void *) 0)) {
101 Data64 &= MsrDesc->ReadMask;
102 }
103
104 break;
105 }
106
107 Reg->Rax = (UINTN)(UINT32)Data64; // HIGH bits are cleared
108 Reg->Rdx = (UINTN)(UINT32)RShiftU64 (Data64, 32); // HIGH bits are cleared
109
110 VmWriteN (VMCS_N_GUEST_RIP_INDEX0x681E, VmReadN(VMCS_N_GUEST_RIP_INDEX0x681E) + VmRead32(VMCS_32_RO_VMEXIT_INSTRUCTION_LENGTH_INDEX0x440C));
111 return ;
112}
113
114/**
115
116 This function is WRMSR handler for SMM.
117
118 @param Index CPU index
119
120**/
121VOIDvoid
122SmmWriteMsrHandler (
123 IN UINT32 Index
124 )
125{
126 UINT64 Data64;
127 UINT32 MsrIndex;
128 VM_ENTRY_CONTROLS VmEntryControls;
129 X86_REGISTER *Reg;
130 STM_RSC_MSR_DESC *MsrDesc;
131 STM_RSC_MSR_DESC LocalMsrDesc;
132 BOOLEAN Result;
133 STM_SMM_CPU_STATE *SmmCpuState;
134 UINT32 VmType = SMI_HANDLER0;
135
136 SmmCpuState = mGuestContextCommonSmi.GuestContextPerCpu[Index].SmmCpuState;
137
138 Reg = &mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Register;
139 MsrIndex = ReadUnaligned32 ((UINT32 *)&Reg->Rcx);
140
141 MsrDesc = GetStmResourceMsr (mHostContextCommon.MleProtectedResource.Base, MsrIndex);
142 if ((MsrDesc != NULL((void *) 0)) && (MsrDesc->WriteMask != 0)) {
143 DEBUG ((EFI_D_ERROR, "WRMSR (%x) violation!\n", MsrIndex))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "WRMSR (%x) violation!\n"
, MsrIndex); } } while (((BOOLEAN)(0==1)));
144 AddEventLogForResource (EvtHandledProtectionException, (STM_RSC *)MsrDesc);
145 SmmExceptionHandler (Index);
146 CpuDeadLoop ();
147 }
148
149 MsrDesc = GetStmResourceMsr ((STM_RSC *)(UINTN)mGuestContextCommonSmm[VmType].BiosHwResourceRequirementsPtr, MsrIndex);
150 if ((MsrDesc == NULL((void *) 0)) || (MsrDesc->WriteMask == 0) || (MsrDesc->KernelModeProcessing == 0)) {
151 ZeroMem (&LocalMsrDesc, sizeof(LocalMsrDesc));
152 LocalMsrDesc.Hdr.RscType = MACHINE_SPECIFIC_REG4;
153 LocalMsrDesc.Hdr.Length = sizeof(LocalMsrDesc);
154 LocalMsrDesc.MsrIndex = MsrIndex;
155 LocalMsrDesc.ReadMask = 0;
156 LocalMsrDesc.WriteMask = (UINT64)-1;
157 AddEventLogForResource (EvtBiosAccessToUnclaimedResource, (STM_RSC *)&LocalMsrDesc);
158 }
159
160// DEBUG ((EFI_D_INFO, "!!!WriteMsrHandler!!!\n"));
161 Data64 = LShiftU64 ((UINT64)ReadUnaligned32 ((UINT32 *)&Reg->Rdx), 32) | (UINT64)ReadUnaligned32 ((UINT32 *)&Reg->Rax);
162
163 switch (MsrIndex) {
164 case IA32_EFER_MSR_INDEX0xC0000080:
165#if 0
166 AcquireSpinLock (&mHostContextCommon.DebugLock);
167 if ((Data64 & IA32_EFER_MSR_SCE1u) != 0) {
168 DEBUG ((EFI_D_INFO, "!!!WriteMsrHandler - SCE!!!\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "!!!WriteMsrHandler - SCE!!!\n"
); } } while (((BOOLEAN)(0==1)));
169 }
170 if ((Data64 & IA32_EFER_MSR_XDE(1u << 11)) != 0) {
171 DEBUG ((EFI_D_INFO, "!!!WriteMsrHandler - XDE!!!\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "!!!WriteMsrHandler - XDE!!!\n"
); } } while (((BOOLEAN)(0==1)));
172 }
173 ReleaseSpinLock (&mHostContextCommon.DebugLock);
174#endif
175 mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer = Data64;
176 //
177 // Check IA32e mode switch
178 //
179 VmEntryControls.Uint32 = VmRead32 (VMCS_32_CONTROL_VMENTRY_CONTROLS_INDEX0x4012);
180 if ((Data64 & IA32_EFER_MSR_MLE(1u << 8)) != 0) {
181 mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer |= IA32_EFER_MSR_MLE(1u << 8);
182 } else {
183 mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer &= ~IA32_EFER_MSR_MLE(1u << 8);
184 }
185 if (((mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer & IA32_EFER_MSR_MLE(1u << 8)) != 0) &&
186 ((mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Cr0 & CR0_PG(1u << 31)) != 0)) {
187 mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer |= IA32_EFER_MSR_MLA(1u << 10);
188 VmEntryControls.Bits.Ia32eGuest = 1;
189 } else {
190 mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer &= ~IA32_EFER_MSR_MLA(1u << 10);
191 VmEntryControls.Bits.Ia32eGuest = 0;
192 }
193 VmWrite32 (VMCS_32_CONTROL_VMENTRY_CONTROLS_INDEX0x4012, VmEntryControls.Uint32);
194 VmWrite64 (VMCS_64_GUEST_IA32_EFER_INDEX0x2806, mGuestContextCommonSmm[VmType].GuestContextPerCpu[Index].Efer);
195
196 break;
197
198 case IA32_SYSENTER_CS_MSR_INDEX0x174:
199 VmWrite32 (VMCS_32_GUEST_IA32_SYSENTER_CS_INDEX0x482A, (UINT32)Data64);
200 break;
201 case IA32_SYSENTER_ESP_MSR_INDEX0x175:
202 VmWriteN (VMCS_N_GUEST_IA32_SYSENTER_ESP_INDEX0x6824, (UINTN)Data64);
203 break;
204 case IA32_SYSENTER_EIP_MSR_INDEX0x176:
205 VmWriteN (VMCS_N_GUEST_IA32_SYSENTER_EIP_INDEX0x6826, (UINTN)Data64);
206 break;
207
208 case IA32_FS_BASE_MSR_INDEX0xC0000100:
209 VmWriteN (VMCS_N_GUEST_FS_BASE_INDEX0x680E, (UINTN)Data64);
210 AsmWriteMsr64 (MsrIndex, Data64); // VMM does not use FS
211 break;
212 case IA32_GS_BASE_MSR_INDEX0xC0000101:
213 VmWriteN (VMCS_N_GUEST_GS_BASE_INDEX0x6810, (UINTN)Data64);
214 AsmWriteMsr64 (MsrIndex, Data64); // VMM does not use GS
215 break;
216#if 0
217 case IA32_KERNAL_GS_BASE_MSR_INDEX0xC0000102:
218 AsmWriteMsr64 (MsrIndex, Data64); // VMM does not use this
219 break;
220 case IA32_STAR_MSR_INDEX0xC0000081:
221 AsmWriteMsr64 (MsrIndex, Data64); // VMM does not use this
222 break;
223 case IA32_LSTAR_MSR_INDEX0xC0000082:
224 AsmWriteMsr64 (MsrIndex, Data64); // VMM does not use this
225 break;
226 case IA32_FMASK_MSR_INDEX0xC0000084:
227 AsmWriteMsr64 (MsrIndex, Data64); // VMM does not use this
228 break;
229#endif
230
231 case IA32_SMM_MONITOR_CTL_MSR_INDEX0x9B:
232 break;
233
234 case EFI_MSR_NEHALEM_SMRR_PHYS_BASE0x1F2:
235 case EFI_MSR_NEHALEM_SMRR_PHYS_MASK0x1F3:
236 // Ignore the write
237 break;
238
239 case IA32_BIOS_UPDT_TRIG_MSR_INDEX0x79:
240 // Only write it when BIOS request MicrocodeUpdate
241 MsrDesc = GetStmResourceMsr ((STM_RSC *)(UINTN)mGuestContextCommonSmm[VmType].BiosHwResourceRequirementsPtr, IA32_BIOS_UPDT_TRIG_MSR_INDEX0x79);
242 if (MsrDesc != NULL((void *) 0)) {
243 AsmWriteMsr64 (MsrIndex, Data64);
244 }
245 break;
246
247 default:
248 Result = StmPlatformLibMsrWrite (MsrIndex, Data64);
249 if (Result) {
250 break;
251 }
252 //
253 // For rest one, we need pass back to BIOS
254 //
255
256 //
257 // Need mask write item
258 //
259 if (MsrDesc != NULL((void *) 0)) {
260 Data64 |= MsrDesc->WriteMask;
261 }
262
263 AsmWriteMsr64 (MsrIndex, Data64);
264 break;
265 }
266
267 VmWriteN (VMCS_N_GUEST_RIP_INDEX0x681E, VmReadN(VMCS_N_GUEST_RIP_INDEX0x681E) + VmRead32(VMCS_32_RO_VMEXIT_INSTRUCTION_LENGTH_INDEX0x440C));
268 return ;
269}