Bug Summary

File:home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Init/StmInit.c
Warning:line 759, column 52
Access to field 'RsdtAddress' results in a dereference of a null pointer (loaded from variable 'Rsdp')

Annotated Source Code

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clang -cc1 -cc1 -triple x86_64-unknown-linux-gnu -analyze -disable-free -clear-ast-before-backend -disable-llvm-verifier -discard-value-names -main-file-name StmInit.c -analyzer-checker=core -analyzer-checker=apiModeling -analyzer-checker=unix -analyzer-checker=deadcode -analyzer-checker=security.insecureAPI.UncheckedReturn -analyzer-checker=security.insecureAPI.getpw -analyzer-checker=security.insecureAPI.gets -analyzer-checker=security.insecureAPI.mktemp -analyzer-checker=security.insecureAPI.mkstemp -analyzer-checker=security.insecureAPI.vfork -analyzer-checker=nullability.NullPassedToNonnull -analyzer-checker=nullability.NullReturnedFromNonnull -analyzer-output plist -w -setup-static-analyzer -mrelocation-model pic -pic-level 2 -fhalf-no-semantic-interposition -fno-jump-tables -mframe-pointer=none -fmath-errno -ffp-contract=on -fno-rounding-math -mconstructor-aliases -ffreestanding -target-cpu x86-64 -tune-cpu generic -debugger-tuning=gdb -fcoverage-compilation-dir=/home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/build/StmPkg/Core -resource-dir /opt/xgcc/lib/clang/17 -include PcdData.h -D COREBOOT32 -D RELEASE -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/EDKII/BaseTools/Source/C/Include/X64 -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/EdkII/MdePkg/Include -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/EdkII/MdePkg/Include/X64 -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Include -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Include/x64 -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime/../Init -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Runtime/. -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Init -I /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Init/../Runtime -internal-isystem /opt/xgcc/lib/clang/17/include -internal-isystem /usr/local/include -internal-isystem /usr/lib/gcc/x86_64-linux-gnu/13/../../../../x86_64-linux-gnu/include -internal-externc-isystem /usr/include/x86_64-linux-gnu -internal-externc-isystem /include -internal-externc-isystem /usr/include -source-date-epoch 1715206807 -Os -fdebug-compilation-dir=/home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/build/StmPkg/Core -ferror-limit 19 -fgnuc-version=4.2.1 -vectorize-loops -vectorize-slp -analyzer-max-loop 10 -analyzer-output=plist-html -faddrsig -o /cb-build/coreboot_scanbuild.0/PURISM_LIBREM15_V4_STM-scanbuildtmp/2024-05-09-081252-3833419-1/report-zfzxQ0.plist -x c /home/coreboot/node-root/workspace/coreboot_scanbuild/3rdparty/stm/Stm/StmPkg/Core/Init/StmInit.c
1/** @file
2 STM initialization
3
4 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php.
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13**/
14
15#include "StmInit.h"
16#include "PeStm.h"
17#include <Library/PcdLib.h>
18#include <string.h>
19
20extern PE_SMI_CONTROL PeSmiControl;
21
22extern void InitPe();
23
24STM_HOST_CONTEXT_COMMON mHostContextCommon;
25STM_GUEST_CONTEXT_COMMON mGuestContextCommonSmi;
26STM_GUEST_CONTEXT_COMMON mGuestContextCommonSmm[NUM_PE_TYPE4];
27
28
29static SPIN_LOCK CpuReadyCountLock;
30static unsigned int CpuReadyCount = 0;
31void CpuReadySync(UINT32 Index);
32VOIDvoid InitCpuReadySync();
33
34volatile BOOLEAN mIsBspInitialized;
35
36extern volatile BOOLEAN *mCpuInitStatus;
37
38/*++
39 STM runtime:
40
41 +------------+
42 | SMM handler|
43 +-------+ +------------+
44 | Guest | -- ^ |
45 +-------+ | (2)VMResume| |(3)RSM
46 |(1) SMI | v
47 +-------+ |-----------> +------------+
48 | | |(4) VMResume |SMI-H SMM-H|
49 | MVMM | -<----------- | STM |
50 | | (0) Init |STM-Init |
51 +-------+ -------------> +------------+
52
53 Memory layout:
54 +--------------------+ --
55 | SMM VMCS | |
56 +--------------------+ |-> Per-Processor VMCS
57 | SMI VMCS | |
58 +--------------------+ --
59 | SMM VMCS | |
60 +--------------------+ |-> Per-Processor VMCS
61 | SMI VMCS | |
62 +--------------------+ --
63 | Stack | |-> Per-Processor Dynamic
64 +--------------------+ --
65 | Stack | |-> Per-Processor Dynamic
66 RSP-> +--------------------+ --
67 | Heap | |
68 +--------------------+ |-> Additional Dynamic
69 | Page Table (24K) | |
70 CR3-> +--------------------+ --
71 RIP-> | STM Code | |
72 +--------------------+ |
73 | GDT (4K) | |-> Static Image
74 GDT-> +--------------------+ |
75 | STM Header (4K) | |
76 MSEG-> +--------------------+ --
77--*/
78
79/**
80
81 This function return 4K page aligned VMCS size.
82
83 @return 4K page aligned VMCS size
84
85**/
86UINT32
87GetVmcsSize (
88 VOIDvoid
89 )
90{
91 UINT64 Data64;
92 UINT32 VmcsSize;
93
94 Data64 = AsmReadMsr64 (IA32_VMX_BASIC_MSR_INDEX0x480);
95 VmcsSize = (UINT32)(RShiftU64 (Data64, 32) & 0xFFFF);
96 VmcsSize = STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (VmcsSize))( ((((VmcsSize) >> 12) + (((VmcsSize) & 0xFFF) ? 1 :
0))) << 12);
97
98 return VmcsSize;
99}
100
101/**
102
103 This function return if Senter executed.
104
105 @retval TRUE Senter executed
106 @retval FALSE Sexit not executed
107
108**/
109BOOLEAN
110IsSentryEnabled (
111 VOIDvoid
112 )
113{
114 UINT32 TxtStatus;
115
116 TxtStatus = TxtPubRead32 (TXT_STS0x0);
117 if (((TxtStatus & TXT_STS_SENTER_DONE0x1) != 0) &&
118 ((TxtStatus & TXT_STS_SEXIT_DONE0x2) == 0)) {
119 return TRUE((BOOLEAN)(1==1));
120 } else {
121 return FALSE((BOOLEAN)(0==1));
122 }
123}
124
125/**
126
127 This function get CPU number in TXT heap region.
128
129 @return CPU number in TXT heap region
130
131**/
132UINT32
133GetCpuNumFromTxt (
134 VOIDvoid
135 )
136{
137 TXT_BIOS_TO_OS_DATA *BiosToOsData;
138
139 BiosToOsData = GetTxtBiosToOsData ();
140
141 return BiosToOsData->NumLogProcs;
142}
143
144/**
145
146 This function return PCI Express information in TXT heap region.
147 Only one segment information is returned.
148
149 @param PciExpressBaseAddress PCI Express base address
150 @param PciExpressLength PCI Express length
151
152 @return PciExpressBaseAddress
153
154**/
155UINT64
156GetPciExpressInfoFromTxt (
157 OUT UINT64 *PciExpressBaseAddress,
158 OUT UINT64 *PciExpressLength
159 )
160{
161 TXT_SINIT_TO_MLE_DATA *SinitToMleData;
162 TXT_SINIT_MEMORY_DESCRIPTOR_RECORD *SinitMemoryDescriptor;
163 UINTN Index;
164
165 SinitToMleData = GetTxtSinitToMleData ();
166 SinitMemoryDescriptor = (TXT_SINIT_MEMORY_DESCRIPTOR_RECORD *)((UINTN)SinitToMleData - sizeof(UINT64) + SinitToMleData->SinitMdrTableOffset);
167 for (Index = 0; Index < SinitToMleData->NumberOfSinitMdrs; Index++) {
168 if (SinitMemoryDescriptor[Index].Type == TXT_SINIT_MDR_TYPE_PCIE3) {
169 *PciExpressBaseAddress = SinitMemoryDescriptor[Index].Address;
170 *PciExpressLength = SinitMemoryDescriptor[Index].Length;
171 return SinitMemoryDescriptor[Index].Address;
172 }
173 }
174
175 *PciExpressBaseAddress = 0;
176 *PciExpressLength = 0;
177 return 0;
178}
179
180#define EBDA_BASE_ADDRESS0x40E 0x40E
181
182/**
183
184 This function find ACPI RSDPTR in TXT heap region.
185
186 @return ACPI RSDPTR in TXT heap region
187
188**/
189VOIDvoid *
190FindTxtAcpiRsdPtr (
191 VOIDvoid
192 )
193{
194 TXT_OS_TO_SINIT_DATA *OsSinitData;
195
196 OsSinitData = GetTxtOsToSinitData ();
197 if (OsSinitData->Version < 5) {
198 return NULL((void*)0);
199 }
200
201 return (VOIDvoid *)(UINTN)OsSinitData->RsdpPtr;
202}
203
204/**
205
206 This function find ACPI RSDPTR in UEFI or legacy region.
207
208 @return ACPI RSDPTR in UEFI or legacy region
209
210**/
211VOIDvoid *
212FindAcpiRsdPtr (
213 VOIDvoid
214 )
215{
216 if (mHostContextCommon.AcpiRsdp != 0) {
217 DEBUG((EFI_D_INFO, "RSDP found in mHostContextCommon.AcpiRsdp 0x%016llx\n", mHostContextCommon.AcpiRsdp))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "RSDP found in mHostContextCommon.AcpiRsdp 0x%016llx\n"
, mHostContextCommon.AcpiRsdp); } } while (((BOOLEAN)(0==1)));
218 return (VOIDvoid *)(UINTN)mHostContextCommon.AcpiRsdp;
219 } else {
220 UINTN Address;
221 DEBUG((EFI_D_INFO, "Searching for RSDP\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Searching for RSDP\n"
); } } while (((BOOLEAN)(0==1)));
222 //
223 // Search EBDA
224 //
225 Address = (*(UINT16 *)(UINTN)(EBDA_BASE_ADDRESS0x40E)) << 4;
226 for (; Address < 0xA0000 ; Address += 0x10) {
227 if (*(UINT64 *)(Address) == EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE(((('R') | ('S' << 8)) | ((('D') | (' ' << 8)) <<
16)) | ((UINT64) (((('P') | ('T' << 8)) | ((('R') | (' '
<< 8)) << 16))) << 32))) {
228 DEBUG((EFI_D_INFO, "RSDP found\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "RSDP found\n"
); } } while (((BOOLEAN)(0==1)));
229 mHostContextCommon.AcpiRsdp = Address; // save having to keep looking for it
230 AsmWbinvd (); // let everone see it
231 return (VOIDvoid *)(Address);
232 }
233 }
234
235 //
236 // First Seach 0x0e0000 - 0x0fffff for RSD Ptr
237 //
238 for (Address = 0xe0000; Address < 0xfffff; Address += 0x10) {
239 //DEBUG((EFI_D_INFO, "0x%08lx 0x%016llx 0x%016llx - ", Address, *(UINT64 *)(Address), EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE));
240 if (*(UINT64 *)(Address) == EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE(((('R') | ('S' << 8)) | ((('D') | (' ' << 8)) <<
16)) | ((UINT64) (((('P') | ('T' << 8)) | ((('R') | (' '
<< 8)) << 16))) << 32))) {
241 DEBUG((EFI_D_INFO, "RSDP found\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "RSDP found\n"
); } } while (((BOOLEAN)(0==1)));
242 mHostContextCommon.AcpiRsdp = Address; // save having to keep looking for it
243 AsmWbinvd ();
244 return (VOIDvoid *)Address;
245 }
246 }
247
248 //
249 // Not found
250 //
251 return NULL((void*)0);
252 }
253}
254
255/**
256
257 This function scan ACPI table in RSDT.
258
259 @param Rsdt ACPI RSDT
260 @param Signature ACPI table signature
261
262 @return ACPI table
263
264**/
265VOIDvoid *
266ScanTableInRSDT (
267 IN EFI_ACPI_DESCRIPTION_HEADER *Rsdt,
268 IN UINT32 Signature
269 )
270{
271 UINTN Index;
272 UINT32 EntryCount;
273 UINT32 *EntryPtr;
274 EFI_ACPI_DESCRIPTION_HEADER *Table;
275
276 EntryCount = (Rsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) / sizeof(UINT32);
277
278 EntryPtr = (UINT32 *)(Rsdt + 1);
279 for (Index = 0; Index < EntryCount; Index ++, EntryPtr ++) {
280 Table = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)(*EntryPtr));
281 if (Table->Signature == Signature) {
282 return Table;
283 }
284 }
285
286 return NULL((void*)0);
287}
288
289/**
290
291 This function scan ACPI table in XSDT.
292
293 @param Xsdt ACPI XSDT
294 @param Signature ACPI table signature
295
296 @return ACPI table
297
298**/
299VOIDvoid *
300ScanTableInXSDT (
301 IN EFI_ACPI_DESCRIPTION_HEADER *Xsdt,
302 IN UINT32 Signature
303 )
304{
305 UINTN Index;
306 UINT32 EntryCount;
307 UINT64 EntryPtr;
308 UINTN BasePtr;
309 EFI_ACPI_DESCRIPTION_HEADER *Table;
310
311 EntryCount = (Xsdt->Length - sizeof (EFI_ACPI_DESCRIPTION_HEADER)) / sizeof(UINT64);
312
313 BasePtr = (UINTN)(Xsdt + 1);
314 for (Index = 0; Index < EntryCount; Index ++) {
315 CopyMem (&EntryPtr, (VOIDvoid *)(BasePtr + Index * sizeof(UINT64)), sizeof(UINT64));
316 Table = (EFI_ACPI_DESCRIPTION_HEADER *)((UINTN)(EntryPtr));
317 if (Table->Signature == Signature) {
318 return Table;
319 }
320 }
321
322 return NULL((void*)0);
323}
324
325/**
326
327 This function find ACPI table according to signature.
328
329 @param RsdPtr ACPI RSDPTR
330 @param Signature ACPI table signature
331
332 @return ACPI table
333
334**/
335VOIDvoid *
336FindAcpiPtr (
337 VOIDvoid *RsdPtr,
338 UINT32 Signature
339 )
340{
341 EFI_ACPI_DESCRIPTION_HEADER *AcpiTable;
342 EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
343 EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
344 EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
345
346 if (RsdPtr == NULL((void*)0)) {
347 return NULL((void*)0);
348 }
349
350 AcpiTable = NULL((void*)0);
351
352 Rsdp = (EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER *)RsdPtr;
353 Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)Rsdp->RsdtAddress;
354 Xsdt = NULL((void*)0);
355 if ((Rsdp->Revision >= 2) && (Rsdp->XsdtAddress < (UINT64)(UINTN)-1)) {
356 Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)Rsdp->XsdtAddress;
357 }
358 //
359 // Check Xsdt
360 //
361 if (Xsdt != NULL((void*)0)) {
362 AcpiTable = ScanTableInXSDT (Xsdt, Signature);
363 }
364 //
365 // Check Rsdt
366 //
367 if ((AcpiTable == NULL((void*)0)) && (Rsdt != NULL((void*)0))) {
368 AcpiTable = ScanTableInRSDT (Rsdt, Signature);
369 }
370
371 return AcpiTable;
372}
373
374/**
375
376 This function return CPU number from MADT.
377
378 @return CPU number
379
380**/
381UINT32
382GetCpuNumFromAcpi (
383 VOIDvoid
384 )
385{
386 UINT32 Index;
387 EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER *Madt;
388 UINTN Length;
389 EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE *LocalApic;
390
391 Madt = FindAcpiPtr (FindAcpiRsdPtr (), EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE((('A') | ('P' << 8)) | ((('I') | ('C' << 8)) <<
16)));
392 if (Madt == NULL((void*)0)) {
393 return 1;
394 }
395
396 Index = 0;
397 Length = Madt->Header.Length;
398 LocalApic = (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE *)(Madt + 1);
399 while ((UINTN)LocalApic < (UINTN)Madt + Length) {
400 if (LocalApic->Type == EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC0x00) {
401 if ((LocalApic->Flags & EFI_ACPI_2_0_LOCAL_APIC_ENABLED0x00000001) != 0) {
402 Index++;
403 }
404 } else if (LocalApic->Type == EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC0x09) {
405 if ((((EFI_ACPI_4_0_PROCESSOR_LOCAL_X2APIC_STRUCTURE *)LocalApic)->Flags & EFI_ACPI_4_0_LOCAL_APIC_ENABLED0x00000001) != 0) {
406 Index++;
407 }
408 }
409 LocalApic = (EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE *)((UINTN)LocalApic + LocalApic->Length);
410 }
411
412 return Index;
413}
414
415/**
416
417 This function return PCI Express information from MCFG.
418 Only one segment information is returned.
419
420 @param PciExpressBaseAddress PCI Express base address
421 @param PciExpressLength PCI Express length
422
423 @return PciExpressBaseAddress
424
425**/
426UINT64
427GetPciExpressInfoFromAcpi (
428 OUT UINT64 *PciExpressBaseAddress,
429 OUT UINT64 *PciExpressLength
430 )
431{
432 EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER *Mcfg;
433 UINTN Length;
434 EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *McfgStruct;
435
436 Mcfg = FindAcpiPtr (FindAcpiRsdPtr (), EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE((('M') | ('C' << 8)) | ((('F') | ('G' << 8)) <<
16)));
437 if (Mcfg == NULL((void*)0)) {
438 *PciExpressBaseAddress = 0;
439 *PciExpressLength = 0;
440 return 0;
441 }
442
443 Length = Mcfg->Header.Length;
444 McfgStruct = (EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCATION_STRUCTURE *)(Mcfg + 1);
445 while ((UINTN)McfgStruct < (UINTN)Mcfg + Length) {
446 if ((McfgStruct->PciSegmentGroupNumber == 0) && (McfgStruct->StartBusNumber == 0)) {
447 *PciExpressBaseAddress = McfgStruct->BaseAddress;
448 *PciExpressLength = (McfgStruct->EndBusNumber + 1) * SIZE_1MB0x00100000;
449 return McfgStruct->BaseAddress;
450 }
451 McfgStruct ++;
452 }
453
454 *PciExpressBaseAddress = 0;
455 *PciExpressLength = 0;
456 return 0;
457}
458
459/**
460
461 This function return minimal MSEG size required by STM.
462
463 @param StmHeader Stm header
464
465 @return minimal MSEG size
466
467**/
468UINTN
469GetMinMsegSize (
470 IN STM_HEADER *StmHeader
471 )
472{
473 UINTN MinMsegSize;
474
475 //MinMsegSize = (STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
476 /* we use the page table offset in this calculation because the static memory size does
477 not account for the data and bss locations which come before the page tables and
478 are cleared by sinit */
479 MinMsegSize = StmHeader->HwStmHdr.Cr3Offset +
480 StmHeader->SwStmHdr.AdditionalDynamicMemorySize +
481 ((StmHeader->SwStmHdr.PerProcDynamicMemorySize + GetVmcsSize () * 2) * mHostContextCommon.CpuNum);
482
483 return MinMsegSize;
484}
485
486/**
487
488 This function return the index of CPU according to stack.
489
490 @param Register stack value of this CPU
491
492 @return CPU index
493
494**/
495UINT32
496GetIndexFromStack (
497 IN X86_REGISTER *Register
498 )
499{
500 STM_HEADER *StmHeader;
501 UINTN ThisStackTop;
502 UINTN StackBottom;
503 UINTN Index;
504
505 StmHeader = (STM_HEADER *)(UINTN)((UINT32)AsmReadMsr64(IA32_SMM_MONITOR_CTL_MSR_INDEX0x9B) & 0xFFFFF000);
506
507 //
508 // Stack top of this CPU
509 //
510 ThisStackTop = ((UINTN)Register + SIZE_4KB0x00001000 - 1) & ~(SIZE_4KB0x00001000 - 1);
511
512 //
513 // EspOffset pointer to bottom of 1st CPU
514 //
515 StackBottom = (UINTN)StmHeader + StmHeader->HwStmHdr.EspOffset;
516 Index = (ThisStackTop - StackBottom) / StmHeader->SwStmHdr.PerProcDynamicMemorySize;
517
518 //
519 // Need minus one for 0-based CPU index
520 //
521 return (UINT32)(Index - 1);
522}
523
524
525UINT64
526GetMsegInfoFromTxt (
527 OUT UINT64 *MsegBase,
528 OUT UINT64 *MsegLength
529 )
530{
531 *MsegBase = TxtPubRead64(TXT_MSEG_BASE0x310);
532 *MsegLength = TxtPubRead64(TXT_MSEG_SIZE0x318);
533 return 0;
534}
535
536/**
537
538 This function return MSEG information from MSR.
539
540 @param MsegBase MSEG base address
541 @param
542 MSEG length
543
544 @return MsegBase
545
546 **/
547
548extern MRTT_INFO mMtrrInfo;
549
550UINT64
551GetMsegInfoFromMsr (
552 OUT UINT64 *MsegBase,
553 OUT UINT64 *MsegLength
554 )
555{
556 UINT32 SmrrBase;
557 UINT32 SmrrLength;
558
559 SmrrBase = (UINT32)mMtrrInfo.SmrrBase & (UINT32)mMtrrInfo.SmrrMask & 0xFFFFF000;
560 SmrrLength = (UINT32)mMtrrInfo.SmrrMask & 0xFFFFF000;
561 SmrrLength = ~SmrrLength + 1;
562
563 *MsegBase = (UINT64)((UINT32)AsmReadMsr64(IA32_SMM_MONITOR_CTL_MSR_INDEX0x9B) & 0xFFFFF000);
564
565 *MsegLength = SmrrLength - (*MsegBase - SmrrBase);
566
567 return *MsegLength;
568}
569
570/**
571
572 This function initialize STM heap.
573
574 @param StmHeader MSEG STM header
575
576**/
577VOIDvoid
578InitHeap (
579 IN STM_HEADER *StmHeader
580 )
581{
582 HEAP_HEADER *HeaderPointer;
583
584 UINT64 MsegBase;
585 UINT64 MsegLength;
586
587 if (IsSentryEnabled()) {
588 GetMsegInfoFromTxt (&MsegBase, &MsegLength);
589 DEBUG ((EFI_D_INFO, "TXT MsegBase- %08x\n", (UINTN)MsegBase))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "TXT MsegBase- %08x\n"
, (UINTN)MsegBase); } } while (((BOOLEAN)(0==1)));
590 DEBUG ((EFI_D_INFO, "TXT MsegLength - %08x\n", (UINTN)MsegLength))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "TXT MsegLength - %08x\n"
, (UINTN)MsegLength); } } while (((BOOLEAN)(0==1)));
591 } else {
592 GetMsegInfoFromMsr (&MsegBase, &MsegLength);
593 }
594 DEBUG ((EFI_D_INFO, "MsegBase (MSR) - %08x\n", (UINTN)MsegBase))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "MsegBase (MSR) - %08x\n"
, (UINTN)MsegBase); } } while (((BOOLEAN)(0==1)));
595 DEBUG ((EFI_D_INFO, "MsegLength (end of TSEG) - %08x\n", (UINTN)MsegLength))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "MsegLength (end of TSEG) - %08x\n"
, (UINTN)MsegLength); } } while (((BOOLEAN)(0==1)));
596 if (MsegBase == 0) {
597 DEBUG ((EFI_D_ERROR, "MsegBase == 0\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "MsegBase == 0\n"
); } } while (((BOOLEAN)(0==1)));
598 CpuDeadLoop ();
599 }
600
601 DEBUG ((EFI_D_INFO, "Cr30Offset - %08x\n", StmHeader->HwStmHdr.Cr3Offset))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Cr30Offset - %08x\n"
, StmHeader->HwStmHdr.Cr3Offset); } } while (((BOOLEAN)(0==
1)));
602 DEBUG ((EFI_D_INFO, "Page Table Start - %08x\n", MsegBase + StmHeader->HwStmHdr.Cr3Offset))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Page Table Start - %08x\n"
, MsegBase + StmHeader->HwStmHdr.Cr3Offset); } } while (((
BOOLEAN)(0==1)));
603
604
605 // make sure that the tseg size was set correctly
606 // right now we will assume a max size of 3mb for mseg, bug, bug
607
608 mHostContextCommon.HeapBottom = (UINT64)((UINTN)StmHeader +
609 StmHeader->HwStmHdr.Cr3Offset +
610 STM_PAGES_TO_SIZE(6)( (6) << 12)); // reserve 6 page for page table
611
612 mHostContextCommon.HeapTop = (UINT64)((UINTN)StmHeader +
613 STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize))( ((((StmHeader->SwStmHdr.StaticImageSize) >> 12) + (
((StmHeader->SwStmHdr.StaticImageSize) & 0xFFF) ? 1 : 0
))) << 12) +
614 StmHeader->SwStmHdr.AdditionalDynamicMemorySize);
615
616 mHostContextCommon.HeapFree = mHostContextCommon.HeapBottom;
617 HeaderPointer = (HEAP_HEADER *)((UINTN) mHostContextCommon.HeapFree);
618
619 HeaderPointer->NextBlock = 0L;
620 HeaderPointer->BlockLength = (mHostContextCommon.HeapTop - mHostContextCommon.HeapBottom) >> 12;
621
622}
623
624/**
625
626 This function initialize basic context for STM.
627
628**/
629VOIDvoid
630InitBasicContext (
631 VOIDvoid
632 )
633{
634 mHostContextCommon.HostContextPerCpu = (STM_HOST_CONTEXT_PER_CPU *)AllocatePages (STM_SIZE_TO_PAGES(sizeof(STM_HOST_CONTEXT_PER_CPU))(((sizeof(STM_HOST_CONTEXT_PER_CPU)) >> 12) + (((sizeof
(STM_HOST_CONTEXT_PER_CPU)) & 0xFFF) ? 1 : 0)) * mHostContextCommon.CpuNum);
635 mGuestContextCommonSmi.GuestContextPerCpu = (STM_GUEST_CONTEXT_PER_CPU *) AllocatePages (STM_SIZE_TO_PAGES(sizeof(STM_GUEST_CONTEXT_PER_CPU))(((sizeof(STM_GUEST_CONTEXT_PER_CPU)) >> 12) + (((sizeof
(STM_GUEST_CONTEXT_PER_CPU)) & 0xFFF) ? 1 : 0)) * mHostContextCommon.CpuNum);
636 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu = AllocatePages (STM_SIZE_TO_PAGES(sizeof(STM_GUEST_CONTEXT_PER_CPU))(((sizeof(STM_GUEST_CONTEXT_PER_CPU)) >> 12) + (((sizeof
(STM_GUEST_CONTEXT_PER_CPU)) & 0xFFF) ? 1 : 0)) * mHostContextCommon.CpuNum);
637}
638
639extern void GetMtrr(); // found in eptinit.c...
640
641/**
642
643 This function initialize BSP.
644
645 @param Register X86 register context
646
647**/
648VOIDvoid
649BspInit (
650 IN X86_REGISTER *Register
651 )
652{
653 STM_HEADER *StmHeader;
654 UINTN VmcsDatabasePage;
655 VMCS_RECORD_STRUCTURE *VmcsRecord;
656 TXT_PROCESSOR_SMM_DESCRIPTOR *TxtProcessorSmmDescriptor;
657 X86_REGISTER *Reg;
658 IA32_IDT_GATE_DESCRIPTOR *IdtGate;
659 UINT32 SubIndex;
660 UINTN XStateSize;
661 UINT32 RegEax;
662 IA32_VMX_MISC_MSR VmxMisc;
663 UINT32 BiosStmVer = 100; // initially assume that the BIOS supports v1.0 of the Intel ref
664 IA32_DESCRIPTOR IdtrLoad;
665
666 GetMtrr(); //Needed in various inits
667 AsmWbinvd(); // make sure it gets out
668
669 StmHeader = (STM_HEADER *)(UINTN)((UINT32)AsmReadMsr64(IA32_SMM_MONITOR_CTL_MSR_INDEX0x9B) & 0xFFFFF000);
670
671 // on a platform that does not start with TXT, cannot assume the data space has been set to zero
672 ZeroMem(&mHostContextCommon, sizeof(STM_HOST_CONTEXT_COMMON));
673 ZeroMem(&mGuestContextCommonSmi, sizeof(STM_HOST_CONTEXT_COMMON));
674 ZeroMem(&mGuestContextCommonSmm, sizeof(STM_HOST_CONTEXT_COMMON) * NUM_PE_TYPE4);
675
676 InitHeap (StmHeader);
677 // after that we can use mHostContextCommon
678
679 InitializeSpinLock (&mHostContextCommon.DebugLock);
680 // after that we can use DEBUG
681
682 DEBUG ((EFI_D_INFO, " ********************** STM/PE *********************\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " ********************** STM/PE *********************\n"
); } } while (((BOOLEAN)(0==1)));
1
Assuming the condition is false
→
2
←
Taking false branch
→
3
←
Loop condition is false. Exiting loop
→
683 DEBUG ((EFI_D_INFO, "!!!STM build time - %a %a!!!\n", (CHAR8 *)__DATE__, (CHAR8 *)__TIME__))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "!!!STM build time - %a %a!!!\n"
, (CHAR8 *)"May 8 2024", (CHAR8 *)"22:20:07"); } } while (((
BOOLEAN)(0==1)));
4
←
Assuming the condition is false
→
5
←
Taking false branch
→
6
←
Loop condition is false. Exiting loop
→
684 DEBUG ((EFI_D_INFO, "!!!STM Relocation DONE!!!\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "!!!STM Relocation DONE!!!\n"
); } } while (((BOOLEAN)(0==1)));
7
←
Assuming the condition is false
→
8
←
Taking false branch
→
9
←
Loop condition is false. Exiting loop
→
685 DEBUG ((EFI_D_INFO, "!!!Enter StmInit (BSP)!!! - %d (%x)\n", (UINTN)0, (UINTN)ReadUnaligned32 ((UINT32 *)&Register->Rax)))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "!!!Enter StmInit (BSP)!!! - %d (%x)\n"
, (UINTN)0, (UINTN)ReadUnaligned32 ((UINT32 *)&Register->
Rax)); } } while (((BOOLEAN)(0==1)));
10
←
Assuming the condition is false
→
11
←
Taking false branch
→
12
←
Loop condition is false. Exiting loop
→
686
687 // Check Signature and size
688 VmxMisc.Uint64 = AsmReadMsr64 (IA32_VMX_MISC_MSR_INDEX0x485);
689 if ((VmxMisc.Uint64 & BIT150x00008000) != 0) {
13
←
Assuming the condition is true
→
14
←
Taking true branch
→
690 TxtProcessorSmmDescriptor = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(UINTN)(AsmReadMsr64 (IA32_SMBASE_INDEX0x9E) + SMM_TXTPSD_OFFSET0xfb00);
691 } else {
692 TxtProcessorSmmDescriptor = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(UINTN)(VmRead32 (VMCS_32_GUEST_SMBASE_INDEX0x4828) + SMM_TXTPSD_OFFSET0xfb00);
693 }
694
695 DEBUG((EFI_D_INFO, "TxtProcessorSmmDescriptor: 0x%016llx\n", TxtProcessorSmmDescriptor))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "TxtProcessorSmmDescriptor: 0x%016llx\n"
, TxtProcessorSmmDescriptor); } } while (((BOOLEAN)(0==1)));
15
←
Assuming the condition is false
→
16
←
Taking false branch
→
17
←
Loop condition is false. Exiting loop
→
696
697 /*debug - used to make sure that the bios properly sets up the Smm Descriptors*********************debug*/
698
699 DEBUG ((EFI_D_INFO, "TxtProcessorSmmDescriptor - %08x\n", (UINTN)TxtProcessorSmmDescriptor))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "TxtProcessorSmmDescriptor - %08x\n"
, (UINTN)TxtProcessorSmmDescriptor); } } while (((BOOLEAN)(0==
1)));
18
←
Assuming the condition is false
→
19
←
Taking false branch
→
20
←
Loop condition is false. Exiting loop
→
700 DEBUG ((EFI_D_INFO, " Signature - %016lx\n", TxtProcessorSmmDescriptor->Signature))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " Signature - %016lx\n"
, TxtProcessorSmmDescriptor->Signature); } } while (((BOOLEAN
)(0==1)));
21
←
Assuming the condition is false
→
22
←
Taking false branch
→
23
←
Loop condition is false. Exiting loop
→
701 DEBUG ((EFI_D_INFO, " Size - %04x\n", (UINTN)TxtProcessorSmmDescriptor->Size))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " Size - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->Size); } } while (((BOOLEAN
)(0==1)));
24
←
Assuming the condition is false
→
25
←
Taking false branch
→
26
←
Loop condition is false. Exiting loop
→
702 DEBUG ((EFI_D_INFO, " SmmDescriptorVerMajor - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmDescriptorVerMajor))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmDescriptorVerMajor - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmDescriptorVerMajor)
; } } while (((BOOLEAN)(0==1)));
27
←
Assuming the condition is false
→
28
←
Taking false branch
→
29
←
Loop condition is false. Exiting loop
→
703 DEBUG ((EFI_D_INFO, " SmmDescriptorVerMinor - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmDescriptorVerMinor))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmDescriptorVerMinor - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmDescriptorVerMinor)
; } } while (((BOOLEAN)(0==1)));
30
←
Assuming the condition is false
→
31
←
Taking false branch
→
32
←
Loop condition is false. Exiting loop
→
704 DEBUG ((EFI_D_INFO, " LocalApicId - %08x\n", (UINTN)TxtProcessorSmmDescriptor->LocalApicId))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " LocalApicId - %08x\n"
, (UINTN)TxtProcessorSmmDescriptor->LocalApicId); } } while
(((BOOLEAN)(0==1)));
33
←
Assuming the condition is false
→
34
←
Taking false branch
→
35
←
Loop condition is false. Exiting loop
→
705 DEBUG ((EFI_D_INFO, " ExecutionDisableOutsideSmrr - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.ExecutionDisableOutsideSmrr))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " ExecutionDisableOutsideSmrr - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.ExecutionDisableOutsideSmrr
); } } while (((BOOLEAN)(0==1)));
36
←
Assuming the condition is false
→
37
←
Taking false branch
→
38
←
Loop condition is false. Exiting loop
→
706 DEBUG ((EFI_D_INFO, " Intel64Mode - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.Intel64Mode))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " Intel64Mode - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.Intel64Mode
); } } while (((BOOLEAN)(0==1)));
39
←
Assuming the condition is false
→
40
←
Taking false branch
→
41
←
Loop condition is false. Exiting loop
→
707 DEBUG ((EFI_D_INFO, " Cr4Pae - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.Cr4Pae))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " Cr4Pae - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.Cr4Pae);
} } while (((BOOLEAN)(0==1)));
42
←
Assuming the condition is false
→
43
←
Taking false branch
→
44
←
Loop condition is false. Exiting loop
→
708 DEBUG ((EFI_D_INFO, " Cr4Pse - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.Cr4Pse))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " Cr4Pse - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmEntryState.Cr4Pse);
} } while (((BOOLEAN)(0==1)));
45
←
Assuming the condition is false
→
46
←
Taking false branch
→
47
←
Loop condition is false. Exiting loop
→
709 DEBUG ((EFI_D_INFO, " SmramToVmcsRestoreRequired - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmResumeState.SmramToVmcsRestoreRequired))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmramToVmcsRestoreRequired - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmResumeState.SmramToVmcsRestoreRequired
); } } while (((BOOLEAN)(0==1)));
48
←
Assuming the condition is false
→
49
←
Taking false branch
→
50
←
Loop condition is false. Exiting loop
→
710 DEBUG ((EFI_D_INFO, " ReinitializeVmcsRequired - %02x\n", (UINTN)TxtProcessorSmmDescriptor->SmmResumeState.ReinitializeVmcsRequired))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " ReinitializeVmcsRequired - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmResumeState.ReinitializeVmcsRequired
); } } while (((BOOLEAN)(0==1)));
51
←
Assuming the condition is false
→
52
←
Taking false branch
→
53
←
Loop condition is false. Exiting loop
→
711 DEBUG ((EFI_D_INFO, " DomainType - %02x\n", (UINTN)TxtProcessorSmmDescriptor->StmSmmState.DomainType))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " DomainType - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmSmmState.DomainType
); } } while (((BOOLEAN)(0==1)));
54
←
Assuming the condition is false
→
55
←
Taking false branch
→
56
←
Loop condition is false. Exiting loop
→
712 DEBUG ((EFI_D_INFO, " XStatePolicy - %02x\n", (UINTN)TxtProcessorSmmDescriptor->StmSmmState.XStatePolicy))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " XStatePolicy - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmSmmState.XStatePolicy
); } } while (((BOOLEAN)(0==1)));
57
←
Assuming the condition is false
→
58
←
Taking false branch
→
59
←
Loop condition is false. Exiting loop
→
713 DEBUG ((EFI_D_INFO, " EptEnabled - %02x\n", (UINTN)TxtProcessorSmmDescriptor->StmSmmState.EptEnabled))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " EptEnabled - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmSmmState.EptEnabled
); } } while (((BOOLEAN)(0==1)));
60
←
Assuming the condition is false
→
61
←
Taking false branch
→
62
←
Loop condition is false. Exiting loop
→
714 DEBUG ((EFI_D_INFO, " SmmCs - %04x\n", (UINTN)TxtProcessorSmmDescriptor->SmmCs))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmCs - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmCs); } } while (((BOOLEAN
)(0==1)));
63
←
Assuming the condition is false
→
64
←
Taking false branch
→
65
←
Loop condition is false. Exiting loop
→
715 DEBUG ((EFI_D_INFO, " SmmDs - %04x\n", (UINTN)TxtProcessorSmmDescriptor->SmmDs))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmDs - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmDs); } } while (((BOOLEAN
)(0==1)));
66
←
Assuming the condition is false
→
67
←
Taking false branch
→
68
←
Loop condition is false. Exiting loop
→
716 DEBUG ((EFI_D_INFO, " SmmSs - %04x\n", (UINTN)TxtProcessorSmmDescriptor->SmmSs))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmSs - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmSs); } } while (((BOOLEAN
)(0==1)));
69
←
Assuming the condition is false
→
70
←
Taking false branch
→
71
←
Loop condition is false. Exiting loop
→
717 DEBUG ((EFI_D_INFO, " SmmOtherSegment - %04x\n", (UINTN)TxtProcessorSmmDescriptor->SmmOtherSegment))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmOtherSegment - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmOtherSegment); } } while
(((BOOLEAN)(0==1)));
72
←
Assuming the condition is false
→
73
←
Taking false branch
→
74
←
Loop condition is false. Exiting loop
→
718 DEBUG ((EFI_D_INFO, " SmmTr - %04x\n", (UINTN)TxtProcessorSmmDescriptor->SmmTr))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmTr - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmTr); } } while (((BOOLEAN
)(0==1)));
75
←
Assuming the condition is false
→
76
←
Taking false branch
→
77
←
Loop condition is false. Exiting loop
→
719 DEBUG ((EFI_D_INFO, " SmmCr3 - %016lx\n", TxtProcessorSmmDescriptor->SmmCr3))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmCr3 - %016lx\n"
, TxtProcessorSmmDescriptor->SmmCr3); } } while (((BOOLEAN
)(0==1)));
78
←
Assuming the condition is false
→
79
←
Taking false branch
→
80
←
Loop condition is false. Exiting loop
→
720 DEBUG ((EFI_D_INFO, " SmmStmSetupRip - %016lx\n", TxtProcessorSmmDescriptor->SmmStmSetupRip))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmStmSetupRip - %016lx\n"
, TxtProcessorSmmDescriptor->SmmStmSetupRip); } } while ((
(BOOLEAN)(0==1)));
81
←
Assuming the condition is false
→
82
←
Taking false branch
→
83
←
Loop condition is false. Exiting loop
→
721 DEBUG ((EFI_D_INFO, " SmmStmTeardownRip - %016lx\n", TxtProcessorSmmDescriptor->SmmStmTeardownRip))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmStmTeardownRip - %016lx\n"
, TxtProcessorSmmDescriptor->SmmStmTeardownRip); } } while
(((BOOLEAN)(0==1)));
84
←
Assuming the condition is false
→
85
←
Taking false branch
→
86
←
Loop condition is false. Exiting loop
→
722 DEBUG ((EFI_D_INFO, " SmmSmiHandlerRip - %016lx\n", TxtProcessorSmmDescriptor->SmmSmiHandlerRip))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmSmiHandlerRip - %016lx\n"
, TxtProcessorSmmDescriptor->SmmSmiHandlerRip); } } while (
((BOOLEAN)(0==1)));
87
←
Assuming the condition is false
→
88
←
Taking false branch
→
89
←
Loop condition is false. Exiting loop
→
723 DEBUG ((EFI_D_INFO, " SmmSmiHandlerRsp - %016lx\n", TxtProcessorSmmDescriptor->SmmSmiHandlerRsp))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmSmiHandlerRsp - %016lx\n"
, TxtProcessorSmmDescriptor->SmmSmiHandlerRsp); } } while (
((BOOLEAN)(0==1)));
90
←
Assuming the condition is false
→
91
←
Taking false branch
→
92
←
Loop condition is false. Exiting loop
→
724 DEBUG ((EFI_D_INFO, " SmmGdtPtr - %016lx\n", TxtProcessorSmmDescriptor->SmmGdtPtr))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmGdtPtr - %016lx\n"
, TxtProcessorSmmDescriptor->SmmGdtPtr); } } while (((BOOLEAN
)(0==1)));
93
←
Assuming the condition is false
→
94
←
Taking false branch
→
95
←
Loop condition is false. Exiting loop
→
725 DEBUG ((EFI_D_INFO, " SmmGdtSize - %08x\n", (UINTN)TxtProcessorSmmDescriptor->SmmGdtSize))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SmmGdtSize - %08x\n"
, (UINTN)TxtProcessorSmmDescriptor->SmmGdtSize); } } while
(((BOOLEAN)(0==1)));
96
←
Assuming the condition is false
→
97
←
Taking false branch
→
98
←
Loop condition is false. Exiting loop
→
726 DEBUG ((EFI_D_INFO, " RequiredStmSmmRevId - %08x\n", (UINTN)TxtProcessorSmmDescriptor->RequiredStmSmmRevId))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " RequiredStmSmmRevId - %08x\n"
, (UINTN)TxtProcessorSmmDescriptor->RequiredStmSmmRevId); }
} while (((BOOLEAN)(0==1)));
99
←
Assuming the condition is false
→
100
←
Taking false branch
→
101
←
Loop condition is false. Exiting loop
→
727 DEBUG ((EFI_D_INFO, " StmProtectionExceptionHandler:\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " StmProtectionExceptionHandler:\n"
); } } while (((BOOLEAN)(0==1)));
102
←
Assuming the condition is false
→
103
←
Taking false branch
→
104
←
Loop condition is false. Exiting loop
→
728 DEBUG ((EFI_D_INFO, " SpeRip - %016lx\n", TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.SpeRip))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SpeRip - %016lx\n"
, TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.SpeRip); } } while (((BOOLEAN)(0==1)));
105
←
Assuming the condition is false
→
106
←
Taking false branch
→
107
←
Loop condition is false. Exiting loop
→
729 DEBUG ((EFI_D_INFO, " SpeRsp - %016lx\n", TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.SpeRsp))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SpeRsp - %016lx\n"
, TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.SpeRsp); } } while (((BOOLEAN)(0==1)));
108
←
Assuming the condition is false
→
109
←
Taking false branch
→
110
←
Loop condition is false. Exiting loop
→
730 DEBUG ((EFI_D_INFO, " SpeSs - %04x\n", (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.SpeSs))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " SpeSs - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.SpeSs); } } while (((BOOLEAN)(0==1)));
111
←
Assuming the condition is false
→
112
←
Taking false branch
→
113
←
Loop condition is false. Exiting loop
→
731 DEBUG ((EFI_D_INFO, " PageViolationException - %04x\n", (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.PageViolationException))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " PageViolationException - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.PageViolationException); } } while (((BOOLEAN)(0==1)));
114
←
Assuming the condition is false
→
115
←
Taking false branch
→
116
←
Loop condition is false. Exiting loop
→
732 DEBUG ((EFI_D_INFO, " MsrViolationException - %04x\n", (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.MsrViolationException))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " MsrViolationException - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.MsrViolationException); } } while (((BOOLEAN)(0==1)));
117
←
Assuming the condition is false
→
118
←
Taking false branch
→
119
←
Loop condition is false. Exiting loop
→
733 DEBUG ((EFI_D_INFO, " RegisterViolationException- %04x\n", (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.RegisterViolationException))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " RegisterViolationException- %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.RegisterViolationException); } } while (((BOOLEAN)(0==1)));
120
←
Assuming the condition is false
→
121
←
Taking false branch
→
122
←
Loop condition is false. Exiting loop
→
734 DEBUG ((EFI_D_INFO, " IoViolationException - %04x\n", (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.IoViolationException))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " IoViolationException - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.IoViolationException); } } while (((BOOLEAN)(0==1)));
123
←
Assuming the condition is false
→
124
←
Taking false branch
→
125
←
Loop condition is false. Exiting loop
→
735 DEBUG ((EFI_D_INFO, " PciViolationException - %04x\n", (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler.PciViolationException))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " PciViolationException - %04x\n"
, (UINTN)TxtProcessorSmmDescriptor->StmProtectionExceptionHandler
.PciViolationException); } } while (((BOOLEAN)(0==1)));
126
←
Assuming the condition is false
→
127
←
Taking false branch
→
128
←
Loop condition is false. Exiting loop
→
736 DEBUG ((EFI_D_INFO, " BiosHwResourceRequirements - %016lx\n", TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " BiosHwResourceRequirements - %016lx\n"
, TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr
); } } while (((BOOLEAN)(0==1)));
129
←
Assuming the condition is false
→
130
←
Taking false branch
→
131
←
Loop condition is false. Exiting loop
→
737 DEBUG ((EFI_D_INFO, " AcpiRsdp - %016lx\n", TxtProcessorSmmDescriptor->AcpiRsdp))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " AcpiRsdp - %016lx\n"
, TxtProcessorSmmDescriptor->AcpiRsdp); } } while (((BOOLEAN
)(0==1)));
132
←
Assuming the condition is false
→
133
←
Taking false branch
→
134
←
Loop condition is false. Exiting loop
→
738 DEBUG ((EFI_D_INFO, " PhysicalAddressBits - %02x\n", (UINTN)TxtProcessorSmmDescriptor->PhysicalAddressBits))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " PhysicalAddressBits - %02x\n"
, (UINTN)TxtProcessorSmmDescriptor->PhysicalAddressBits); }
} while (((BOOLEAN)(0==1)));
135
←
Assuming the condition is false
→
136
←
Taking false branch
→
137
←
Loop condition is false. Exiting loop
→
739
740 /************************************debug**********************************************************************/
741
742 // We have to know CpuNum, or we do not know where VMCS will be.
743 if (IsSentryEnabled ()) {
138
←
Taking false branch
→
744 mHostContextCommon.CpuNum = GetCpuNumFromTxt ();
745 DEBUG ((EFI_D_INFO, "CpuNumber from TXT Region - %d\n", (UINTN)mHostContextCommon.CpuNum))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "CpuNumber from TXT Region - %d\n"
, (UINTN)mHostContextCommon.CpuNum); } } while (((BOOLEAN)(0==
1)));
746 } else {
747 {
748 EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER *Rsdp;
749 EFI_ACPI_DESCRIPTION_HEADER *Rsdt;
750 EFI_ACPI_DESCRIPTION_HEADER *Xsdt;
751
752 mHostContextCommon.AcpiRsdp = TxtProcessorSmmDescriptor->AcpiRsdp;
753 Rsdp = FindAcpiRsdPtr ();
139
←
Value assigned to 'Rsdp'
→
754 DEBUG ((EFI_D_INFO, "Rsdp - %08x\n", Rsdp))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Rsdp - %08x\n"
, Rsdp); } } while (((BOOLEAN)(0==1)));
140
←
Assuming the condition is false
→
141
←
Taking false branch
→
142
←
Loop condition is false. Exiting loop
→
755 if (Rsdp == NULL((void*)0)) {
143
←
Assuming 'Rsdp' is equal to NULL
→
144
←
Taking true branch
→
756 DEBUG ((EFI_D_INFO, "Null Rsdp - Can not continue\n", Rsdp))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Null Rsdp - Can not continue\n"
, Rsdp); } } while (((BOOLEAN)(0==1)));
145
←
Assuming the condition is false
→
146
←
Taking false branch
→
147
←
Loop condition is false. Exiting loop
→
757 CpuDeadLoop ();
758 }
759 Rsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)Rsdp->RsdtAddress;
148
←
Access to field 'RsdtAddress' results in a dereference of a null pointer (loaded from variable 'Rsdp')
760 DEBUG ((EFI_D_INFO, "Rsdt - %08x\n", Rsdt))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Rsdt - %08x\n"
, Rsdt); } } while (((BOOLEAN)(0==1)));
761 DEBUG ((EFI_D_INFO, "RsdtLen - %08x\n", Rsdt->Length))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "RsdtLen - %08x\n"
, Rsdt->Length); } } while (((BOOLEAN)(0==1)));
762 if ((Rsdp->Revision >= 2) && (Rsdp->XsdtAddress < (UINT64)(UINTN)-1)) {
763 Xsdt = (EFI_ACPI_DESCRIPTION_HEADER *)(UINTN)Rsdp->XsdtAddress;
764 DEBUG ((EFI_D_INFO, "Xsdt - %016lx\n", Xsdt))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Xsdt - %016lx\n"
, Xsdt); } } while (((BOOLEAN)(0==1)));
765 DEBUG ((EFI_D_INFO, "XsdtLen - %08x\n", Xsdt->Length))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "XsdtLen - %08x\n"
, Xsdt->Length); } } while (((BOOLEAN)(0==1)));
766 }
767 }
768
769 mHostContextCommon.CpuNum = GetCpuNumFromAcpi ();
770 DEBUG ((EFI_D_INFO, "CpuNumber from ACPI MADT - %d\n", (UINTN)mHostContextCommon.CpuNum))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "CpuNumber from ACPI MADT - %d\n"
, (UINTN)mHostContextCommon.CpuNum); } } while (((BOOLEAN)(0==
1)));
771 }
772
773 InterlockedIncrement (&mHostContextCommon.JoinedCpuNum);
774 mHostContextCommon.StmShutdown = 0; // used by Stm/Pe to know when to stop the timer
775 InitializeSpinLock (&mHostContextCommon.MemoryLock);
776 InitializeSpinLock (&mHostContextCommon.SmiVmcallLock);
777 InitializeSpinLock (&mHostContextCommon.PciLock);
778
779 DEBUG ((EFI_D_INFO, "HeapBottom - %08x\n", mHostContextCommon.HeapBottom))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "HeapBottom - %08x\n"
, mHostContextCommon.HeapBottom); } } while (((BOOLEAN)(0==1)
));
780 DEBUG ((EFI_D_INFO, "HeapTop - %08x\n", mHostContextCommon.HeapTop))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "HeapTop - %08x\n"
, mHostContextCommon.HeapTop); } } while (((BOOLEAN)(0==1)));
781
782 // initialize PE state
783
784 PeSmiControl.PeExec = 0;
785 PeSmiControl.PeNmiBreak = 0;
786 PeSmiControl.PeCpuIndex = -1;
787
788 // Initialize CpuSync
789
790 CpuReadyCount = 0;
791 InitializeSpinLock(&CpuReadyCountLock);
792
793 if (TxtProcessorSmmDescriptor->Signature != TXT_PROCESSOR_SMM_DESCRIPTOR_SIGNATURE(((('T') | ('X' << 8)) | ((('T') | ('P' << 8)) <<
16)) | ((UINT64) (((('S') | ('S' << 8)) | ((('I') | ('G'
<< 8)) << 16))) << 32))) {
794 DEBUG ((EFI_D_INFO, "TXT Descriptor Signature ERROR - %016lx!\n", TxtProcessorSmmDescriptor->Signature))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "TXT Descriptor Signature ERROR - %016lx!\n"
, TxtProcessorSmmDescriptor->Signature); } } while (((BOOLEAN
)(0==1)));
795 CpuDeadLoop ();
796 }
797 if(TxtProcessorSmmDescriptor->Size == sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) - 9) // are we dealing with a .99 Bios
798 {
799 BiosStmVer = 99; // version .99 has nine less bytes, etc
800 DEBUG((EFI_D_INFO, "Version .99 Bios detected Found Size: %08x SizeOf %08x\n", TxtProcessorSmmDescriptor->Size, sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR)))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Version .99 Bios detected Found Size: %08x SizeOf %08x\n"
, TxtProcessorSmmDescriptor->Size, sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR
)); } } while (((BOOLEAN)(0==1)));
801 }
802 else
803 {
804 if (TxtProcessorSmmDescriptor->Size != sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR)) {
805 DEBUG ((EFI_D_INFO, "TXT Descriptor Size ERROR - %08x! Found %08x\n", TxtProcessorSmmDescriptor->Size, sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR) ))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "TXT Descriptor Size ERROR - %08x! Found %08x\n"
, TxtProcessorSmmDescriptor->Size, sizeof(TXT_PROCESSOR_SMM_DESCRIPTOR
) ); } } while (((BOOLEAN)(0==1)));
806 CpuDeadLoop ();
807 }
808 }
809 InitBasicContext ();
810
811 DEBUG ((EFI_D_INFO, "Register(%d) - %08x\n", (UINTN)0, Register))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Register(%d) - %08x\n"
, (UINTN)0, Register); } } while (((BOOLEAN)(0==1)));
812 Reg = &mGuestContextCommonSmi.GuestContextPerCpu[0].Register;
813 Register->Rsp = VmReadN (VMCS_N_GUEST_RSP_INDEX0x681C);
814 CopyMem (Reg, Register, sizeof(X86_REGISTER));
815
816 mHostContextCommon.StmHeader = StmHeader;
817 DEBUG ((EFI_D_INFO, "StmHeader - %08x\n", (UINTN)mHostContextCommon.StmHeader))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "StmHeader - %08x\n"
, (UINTN)mHostContextCommon.StmHeader); } } while (((BOOLEAN)
(0==1)));
818 DEBUG ((EFI_D_INFO, "Hardware field:\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Hardware field:\n"
); } } while (((BOOLEAN)(0==1)));
819 DEBUG ((EFI_D_INFO, " StmHeaderRevision - %08x\n", (UINTN)StmHeader->HwStmHdr.StmHeaderRevision))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " StmHeaderRevision - %08x\n"
, (UINTN)StmHeader->HwStmHdr.StmHeaderRevision); } } while
(((BOOLEAN)(0==1)));
820 DEBUG ((EFI_D_INFO, " MonitorFeatures - %08x\n", (UINTN)StmHeader->HwStmHdr.MonitorFeatures))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " MonitorFeatures - %08x\n"
, (UINTN)StmHeader->HwStmHdr.MonitorFeatures); } } while (
((BOOLEAN)(0==1)));
821 DEBUG ((EFI_D_INFO, " GdtrLimit - %08x\n", (UINTN)StmHeader->HwStmHdr.GdtrLimit))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " GdtrLimit - %08x\n"
, (UINTN)StmHeader->HwStmHdr.GdtrLimit); } } while (((BOOLEAN
)(0==1)));
822 DEBUG ((EFI_D_INFO, " GdtrBaseOffset - %08x\n", (UINTN)StmHeader->HwStmHdr.GdtrBaseOffset))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " GdtrBaseOffset - %08x\n"
, (UINTN)StmHeader->HwStmHdr.GdtrBaseOffset); } } while ((
(BOOLEAN)(0==1)));
823 DEBUG ((EFI_D_INFO, " CsSelector - %08x\n", (UINTN)StmHeader->HwStmHdr.CsSelector))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " CsSelector - %08x\n"
, (UINTN)StmHeader->HwStmHdr.CsSelector); } } while (((BOOLEAN
)(0==1)));
824 DEBUG ((EFI_D_INFO, " EipOffset - %08x\n", (UINTN)StmHeader->HwStmHdr.EipOffset))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " EipOffset - %08x\n"
, (UINTN)StmHeader->HwStmHdr.EipOffset); } } while (((BOOLEAN
)(0==1)));
825 DEBUG ((EFI_D_INFO, " EspOffset - %08x\n", (UINTN)StmHeader->HwStmHdr.EspOffset))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " EspOffset - %08x\n"
, (UINTN)StmHeader->HwStmHdr.EspOffset); } } while (((BOOLEAN
)(0==1)));
826 DEBUG ((EFI_D_INFO, " Cr3Offset - %08x\n", (UINTN)StmHeader->HwStmHdr.Cr3Offset))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " Cr3Offset - %08x\n"
, (UINTN)StmHeader->HwStmHdr.Cr3Offset); } } while (((BOOLEAN
)(0==1)));
827 DEBUG ((EFI_D_INFO, "Software field:\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "Software field:\n"
); } } while (((BOOLEAN)(0==1)));
828 DEBUG ((EFI_D_INFO, " StmSpecVerMajor - %02x\n", (UINTN)StmHeader->SwStmHdr.StmSpecVerMajor))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " StmSpecVerMajor - %02x\n"
, (UINTN)StmHeader->SwStmHdr.StmSpecVerMajor); } } while (
((BOOLEAN)(0==1)));
829 DEBUG ((EFI_D_INFO, " StmSpecVerMinor - %02x\n", (UINTN)StmHeader->SwStmHdr.StmSpecVerMinor))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " StmSpecVerMinor - %02x\n"
, (UINTN)StmHeader->SwStmHdr.StmSpecVerMinor); } } while (
((BOOLEAN)(0==1)));
830 DEBUG ((EFI_D_INFO, " StaticImageSize - %08x\n", (UINTN)StmHeader->SwStmHdr.StaticImageSize))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " StaticImageSize - %08x\n"
, (UINTN)StmHeader->SwStmHdr.StaticImageSize); } } while (
((BOOLEAN)(0==1)));
831 DEBUG ((EFI_D_INFO, " PerProcDynamicMemorySize - %08x\n", (UINTN)StmHeader->SwStmHdr.PerProcDynamicMemorySize))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " PerProcDynamicMemorySize - %08x\n"
, (UINTN)StmHeader->SwStmHdr.PerProcDynamicMemorySize); } }
while (((BOOLEAN)(0==1)));
832 DEBUG ((EFI_D_INFO, " AdditionalDynamicMemorySize - %08x\n", (UINTN)StmHeader->SwStmHdr.AdditionalDynamicMemorySize))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " AdditionalDynamicMemorySize - %08x\n"
, (UINTN)StmHeader->SwStmHdr.AdditionalDynamicMemorySize);
} } while (((BOOLEAN)(0==1)));
833 DEBUG ((EFI_D_INFO, " Intel64ModeSupported - %08x\n", (UINTN)StmHeader->SwStmHdr.StmFeatures.Intel64ModeSupported))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " Intel64ModeSupported - %08x\n"
, (UINTN)StmHeader->SwStmHdr.StmFeatures.Intel64ModeSupported
); } } while (((BOOLEAN)(0==1)));
834 DEBUG ((EFI_D_INFO, " EptSupported - %08x\n", (UINTN)StmHeader->SwStmHdr.StmFeatures.EptSupported))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " EptSupported - %08x\n"
, (UINTN)StmHeader->SwStmHdr.StmFeatures.EptSupported); } }
while (((BOOLEAN)(0==1)));
835 DEBUG ((EFI_D_INFO, " NumberOfRevIDs - %08x\n", (UINTN)StmHeader->SwStmHdr.NumberOfRevIDs))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " NumberOfRevIDs - %08x\n"
, (UINTN)StmHeader->SwStmHdr.NumberOfRevIDs); } } while ((
(BOOLEAN)(0==1)));
836 for (SubIndex = 0; SubIndex < StmHeader->SwStmHdr.NumberOfRevIDs; SubIndex++) {
837 DEBUG ((EFI_D_INFO, " StmSmmRevID(%02d) - %08x\n", (UINTN)SubIndex, (UINTN)StmHeader->SwStmHdr.StmSmmRevID[SubIndex]))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, " StmSmmRevID(%02d) - %08x\n"
, (UINTN)SubIndex, (UINTN)StmHeader->SwStmHdr.StmSmmRevID[
SubIndex]); } } while (((BOOLEAN)(0==1)));
838 }
839
840 mHostContextCommon.AcpiRsdp = TxtProcessorSmmDescriptor->AcpiRsdp;
841
842 //
843 // Check MSEG BASE/SIZE in TXT region
844 //
845 mHostContextCommon.StmSize = GetMinMsegSize (StmHeader);
846 {
847 UINT64 MsegBase, MsegLength;
848 INT32 AvailMseg;
849
850 if (IsSentryEnabled()) {
851 GetMsegInfoFromTxt (&MsegBase, &MsegLength);
852 } else {
853 GetMsegInfoFromMsr (&MsegBase, &MsegLength);
854 }
855 AvailMseg = MsegLength - mHostContextCommon.StmSize;
856
857 DEBUG ((EFI_D_INFO, "MinMsegSize - 0x%08x MsegLength 0x%08x AvailMseg 0x%08x \n",do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "MinMsegSize - 0x%08x MsegLength 0x%08x AvailMseg 0x%08x \n"
, (UINTN)mHostContextCommon.StmSize, MsegLength, AvailMseg); }
} while (((BOOLEAN)(0==1)))
858 (UINTN)mHostContextCommon.StmSize,do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "MinMsegSize - 0x%08x MsegLength 0x%08x AvailMseg 0x%08x \n"
, (UINTN)mHostContextCommon.StmSize, MsegLength, AvailMseg); }
} while (((BOOLEAN)(0==1)))
859 MsegLength,do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "MinMsegSize - 0x%08x MsegLength 0x%08x AvailMseg 0x%08x \n"
, (UINTN)mHostContextCommon.StmSize, MsegLength, AvailMseg); }
} while (((BOOLEAN)(0==1)))
860 AvailMseg))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "MinMsegSize - 0x%08x MsegLength 0x%08x AvailMseg 0x%08x \n"
, (UINTN)mHostContextCommon.StmSize, MsegLength, AvailMseg); }
} while (((BOOLEAN)(0==1)));
861 }
862
863 if(BiosStmVer == 99)
864 {
865 mHostContextCommon.PhysicalAddressBits = 36; // for v.99 use this value for now. CPUID value might be too big
866 }
867 else
868 {
869 mHostContextCommon.PhysicalAddressBits = TxtProcessorSmmDescriptor->PhysicalAddressBits;
870 }
871
872 AsmCpuid(CPUID_EXTENDED_INFORMATION0x80000000, &RegEax, NULL((void*)0), NULL((void*)0), NULL((void*)0));
873 if (RegEax >= CPUID_EXTENDED_ADDRESS_SIZE0x80000008) {
874 AsmCpuid(CPUID_EXTENDED_ADDRESS_SIZE0x80000008, &RegEax, NULL((void*)0), NULL((void*)0), NULL((void*)0));
875 RegEax = (UINT8)RegEax;
876 DEBUG((EFI_D_INFO, "CPUID - PhysicalAddressBits - 0x%02x\n", (UINT8)RegEax))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "CPUID - PhysicalAddressBits - 0x%02x\n"
, (UINT8)RegEax); } } while (((BOOLEAN)(0==1)));
877 } else {
878 RegEax = 36;
879 }
880 if ((mHostContextCommon.PhysicalAddressBits == 0) || (mHostContextCommon.PhysicalAddressBits > (UINT8)RegEax)) {
881 mHostContextCommon.PhysicalAddressBits = (UINT8)RegEax;
882 }
883 if (sizeof(UINTN) == sizeof(UINT32)) {
884 if (mHostContextCommon.PhysicalAddressBits > 32) {
885 mHostContextCommon.PhysicalAddressBits = 32;
886 }
887 }
888 mHostContextCommon.MaximumSupportAddress = (LShiftU64(1, mHostContextCommon.PhysicalAddressBits) - 1);
889
890 mHostContextCommon.PageTable = AsmReadCr3 ();
891 AsmReadGdtr (&mHostContextCommon.Gdtr);
892
893 //
894 // Set up STM host IDT to catch exception
895 //
896 mHostContextCommon.Idtr.Limit = (UINT16)(STM_MAX_IDT_NUM0x20 * sizeof (IA32_IDT_GATE_DESCRIPTOR) - 1);
897 mHostContextCommon.Idtr.Base = (UINTN)AllocatePages (STM_SIZE_TO_PAGES (mHostContextCommon.Idtr.Limit + 1)(((mHostContextCommon.Idtr.Limit + 1) >> 12) + (((mHostContextCommon
.Idtr.Limit + 1) & 0xFFF) ? 1 : 0)));
898 IdtGate = (IA32_IDT_GATE_DESCRIPTOR *)mHostContextCommon.Idtr.Base;
899 InitializeExternalVectorTablePtr (IdtGate);
900
901 //IA32_DESCRIPTOR IdtrLoad;
902
903 IdtrLoad = mHostContextCommon.Idtr;
904
905 AsmWriteIdtr(&IdtrLoad);
906
907 //
908 // Add more paging for Host CR3.
909 /////////
910 //CreateHostPaging ();
911 // make host paging dynamic to save space for the PE/VMs
912 SetupStmPageFault();
913
914 // VMCS database: One CPU one page should be enough
915 VmcsDatabasePage = mHostContextCommon.CpuNum;
916 mHostContextCommon.VmcsDatabase = (UINT64)(UINTN)AllocatePages (VmcsDatabasePage);
917 // Set last entry
918 ZeroMem ((VOIDvoid *)(UINTN)mHostContextCommon.VmcsDatabase, STM_PAGES_TO_SIZE(VmcsDatabasePage)( (VmcsDatabasePage) << 12));
919 VmcsRecord = (VMCS_RECORD_STRUCTURE *)(UINTN)mHostContextCommon.VmcsDatabase;
920 VmcsRecord[STM_PAGES_TO_SIZE(VmcsDatabasePage)( (VmcsDatabasePage) << 12) / sizeof(VMCS_RECORD_STRUCTURE) - 1].Type = VMCS_RECORD_LAST0xFFFFFFFF;
921// DumpVmcsRecord (mHostContextCommon.VmcsDatabase);
922
923 // EventLog
924 InitializeEventLog ();
925
926 mCpuInitStatus = AllocatePages (STM_SIZE_TO_PAGES (mHostContextCommon.CpuNum)(((mHostContextCommon.CpuNum) >> 12) + (((mHostContextCommon
.CpuNum) & 0xFFF) ? 1 : 0)));
927
928 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[0].Cr3 = (UINTN)TxtProcessorSmmDescriptor->SmmCr3;
929 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[0].Actived = FALSE((BOOLEAN)(0==1));
930
931 //
932 // CompatiblePageTable for IA32 flat mode only
933 //
934 mGuestContextCommonSmm[SMI_HANDLER0].CompatiblePageTable = CreateCompatiblePageTable ();
935 mGuestContextCommonSmm[SMI_HANDLER0].CompatiblePaePageTable = CreateCompatiblePaePageTable ();
936
937 //
938 // Allocate XState buffer
939 //
940 XStateSize = CalculateXStateSize ();
941 mGuestContextCommonSmi.ZeroXStateBuffer = (UINTN)AllocatePages (STM_SIZE_TO_PAGES(XStateSize)(((XStateSize) >> 12) + (((XStateSize) & 0xFFF) ? 1
: 0)));
942 for (SubIndex = 0; SubIndex < mHostContextCommon.CpuNum; SubIndex++) {
943 mGuestContextCommonSmi.GuestContextPerCpu[SubIndex].XStateBuffer = (UINTN)AllocatePages (STM_SIZE_TO_PAGES(XStateSize)(((XStateSize) >> 12) + (((XStateSize) & 0xFFF) ? 1
: 0)));
944 }
945
946 EptInit ();
947 IoInit ();
948 MsrInit ();
949
950 //
951 // Get PciExpressBaseAddress
952 //
953 if (IsSentryEnabled()) {
954 GetPciExpressInfoFromTxt(&mHostContextCommon.PciExpressBaseAddress, &mHostContextCommon.PciExpressLength);
955 DEBUG((EFI_D_INFO, "PCIExpressBase from TXT Region - %x\n", (UINTN)mHostContextCommon.PciExpressBaseAddress))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "PCIExpressBase from TXT Region - %x\n"
, (UINTN)mHostContextCommon.PciExpressBaseAddress); } } while
(((BOOLEAN)(0==1)));
956 DEBUG((EFI_D_INFO, "PCIExpressLength from TXT Region - %x\n", (UINTN)mHostContextCommon.PciExpressLength))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "PCIExpressLength from TXT Region - %x\n"
, (UINTN)mHostContextCommon.PciExpressLength); } } while (((BOOLEAN
)(0==1)));
957 } else {
958 GetPciExpressInfoFromAcpi(&mHostContextCommon.PciExpressBaseAddress, &mHostContextCommon.PciExpressLength);
959 DEBUG((EFI_D_INFO, "PCIExpressBase from ACPI MCFG - %x\n", (UINTN)mHostContextCommon.PciExpressBaseAddress))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "PCIExpressBase from ACPI MCFG - %x\n"
, (UINTN)mHostContextCommon.PciExpressBaseAddress); } } while
(((BOOLEAN)(0==1)));
960 DEBUG((EFI_D_INFO, "PCIExpressLength from ACPI MCFG - %x\n", (UINTN)mHostContextCommon.PciExpressLength))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "PCIExpressLength from ACPI MCFG - %x\n"
, (UINTN)mHostContextCommon.PciExpressLength); } } while (((BOOLEAN
)(0==1)));
961 }
962 if (mHostContextCommon.PciExpressBaseAddress == 0) {
963 DEBUG((EFI_D_INFO, "mHostContextCommon.PciExpressBaseAddress == 0\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "mHostContextCommon.PciExpressBaseAddress == 0\n"
); } } while (((BOOLEAN)(0==1)));
964 CpuDeadLoop();
965 }
966 if ((mHostContextCommon.PciExpressBaseAddress > mHostContextCommon.MaximumSupportAddress) ||
967 (mHostContextCommon.PciExpressLength > mHostContextCommon.MaximumSupportAddress - mHostContextCommon.PciExpressBaseAddress)) {
968 DEBUG((EFI_D_INFO, "mHostContextCommon.PciExpressBaseAddress overflow MaximumSupportAddress\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "mHostContextCommon.PciExpressBaseAddress overflow MaximumSupportAddress\n"
); } } while (((BOOLEAN)(0==1)));
969 CpuDeadLoop();
970 }
971 if (IsOverlap (mHostContextCommon.PciExpressBaseAddress, mHostContextCommon.PciExpressLength, mHostContextCommon.TsegBase, mHostContextCommon.TsegLength)) {
972 DEBUG((EFI_D_INFO, "mHostContextCommon.PciExpressBaseAddress overlap with TSEG\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "mHostContextCommon.PciExpressBaseAddress overlap with TSEG\n"
); } } while (((BOOLEAN)(0==1)));
973 CpuDeadLoop();
974 }
975 PcdSet64(PcdPciExpressBaseAddress, mHostContextCommon.PciExpressBaseAddress)(_gPcd_BinaryPatch_PcdPciExpressBaseAddress = ((mHostContextCommon
.PciExpressBaseAddress)));
976
977 for (SubIndex = 0; SubIndex < mHostContextCommon.CpuNum; SubIndex++) {
978 mHostContextCommon.HostContextPerCpu[SubIndex].HostMsrEntryCount = 1;
979 mGuestContextCommonSmi.GuestContextPerCpu[SubIndex].GuestMsrEntryCount = 1;
980 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[SubIndex].GuestMsrEntryCount = 1;
981 mHostContextCommon.HostContextPerCpu[SubIndex].GuestVmType = SMI_HANDLER0;
982 }
983 mHostContextCommon.HostContextPerCpu[0].HostMsrEntryAddress = (UINT64)(UINTN)AllocatePages (STM_SIZE_TO_PAGES (sizeof(VM_EXIT_MSR_ENTRY) * mHostContextCommon.HostContextPerCpu[0].HostMsrEntryCount * mHostContextCommon.CpuNum)(((sizeof(VM_EXIT_MSR_ENTRY) * mHostContextCommon.HostContextPerCpu
[0].HostMsrEntryCount * mHostContextCommon.CpuNum) >> 12
) + (((sizeof(VM_EXIT_MSR_ENTRY) * mHostContextCommon.HostContextPerCpu
[0].HostMsrEntryCount * mHostContextCommon.CpuNum) & 0xFFF
) ? 1 : 0)));
984 mGuestContextCommonSmi.GuestContextPerCpu[0].GuestMsrEntryAddress = (UINT64)(UINTN)AllocatePages (STM_SIZE_TO_PAGES (sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmi.GuestContextPerCpu[0].GuestMsrEntryCount * mHostContextCommon.CpuNum)(((sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmi.GuestContextPerCpu
[0].GuestMsrEntryCount * mHostContextCommon.CpuNum) >> 12
) + (((sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmi.GuestContextPerCpu
[0].GuestMsrEntryCount * mHostContextCommon.CpuNum) & 0xFFF
) ? 1 : 0)));
985 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[SubIndex].GuestMsrEntryAddress = (UINT64)(UINTN)AllocatePages (STM_SIZE_TO_PAGES(sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[0].GuestMsrEntryCount * mHostContextCommon.CpuNum)(((sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmm[0].GuestContextPerCpu
[0].GuestMsrEntryCount * mHostContextCommon.CpuNum) >> 12
) + (((sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmm[0].
GuestContextPerCpu[0].GuestMsrEntryCount * mHostContextCommon
.CpuNum) & 0xFFF) ? 1 : 0)));
986 for (SubIndex = 0; SubIndex < mHostContextCommon.CpuNum; SubIndex++) {
987 mHostContextCommon.HostContextPerCpu[SubIndex].HostMsrEntryAddress = mHostContextCommon.HostContextPerCpu[0].HostMsrEntryAddress + sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmi.GuestContextPerCpu[0].GuestMsrEntryCount * SubIndex;
988 mGuestContextCommonSmi.GuestContextPerCpu[SubIndex].GuestMsrEntryAddress = mGuestContextCommonSmi.GuestContextPerCpu[0].GuestMsrEntryAddress + sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmi.GuestContextPerCpu[0].GuestMsrEntryCount * SubIndex;
989 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[SubIndex].GuestMsrEntryAddress = mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[0].GuestMsrEntryAddress + sizeof(VM_EXIT_MSR_ENTRY) * mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[0].GuestMsrEntryCount * SubIndex;
990 }
991
992 DEBUG ((EFI_D_INFO, "DumpStmResource - %x\n", TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "DumpStmResource - %x\n"
, TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr
); } } while (((BOOLEAN)(0==1)));
993 DumpStmResource ((STM_RSC *)(UINTN)TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr);
994 DEBUG ((EFI_D_INFO, "RegisterBiosResource - %x\n", TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "RegisterBiosResource - %x\n"
, TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr
); } } while (((BOOLEAN)(0==1)));
995 RegisterBiosResource ((STM_RSC *)(UINTN)TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr);
996
997 InitStmHandlerSmi ();
998 InitStmHandlerSmm ();
999
1000 InitPe(); // Initialize protected execution
1001 //STM_PERF_INIT;
1002
1003 //
1004 // Initialization done
1005 //
1006
1007 mIsBspInitialized = TRUE((BOOLEAN)(1==1));
1008 AsmWbinvd (); // let everyone else know
1009 return ;
1010}
1011
1012/**
1013
1014 This function initialize AP.
1015
1016 @param Index CPU index
1017 @param Register X86 register context
1018
1019**/
1020VOIDvoid
1021ApInit (
1022 IN UINT32 Index,
1023 IN X86_REGISTER *Register
1024 )
1025{
1026 X86_REGISTER *Reg;
1027 IA32_DESCRIPTOR IdtrLoad;
1028
1029 while (!mIsBspInitialized) {
1030 //
1031 // Wait here
1032 //
1033 }
1034
1035 DEBUG ((EFI_D_INFO, "%ld !!!Enter StmInit (AP done)!!! (%x)\n", (UINTN)Index, (UINTN)ReadUnaligned32 ((UINT32 *)&Register->Rax)))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "%ld !!!Enter StmInit (AP done)!!! (%x)\n"
, (UINTN)Index, (UINTN)ReadUnaligned32 ((UINT32 *)&Register
->Rax)); } } while (((BOOLEAN)(0==1)));
1036
1037 if (Index >= mHostContextCommon.CpuNum) {
1038 DEBUG ((EFI_D_INFO, "%ld !!!Index(0x%x) >= mHostContextCommon.CpuNum(0x%x)\n", Index, (UINTN)Index, (UINTN)mHostContextCommon.CpuNum))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "%ld !!!Index(0x%x) >= mHostContextCommon.CpuNum(0x%x)\n"
, Index, (UINTN)Index, (UINTN)mHostContextCommon.CpuNum); } }
while (((BOOLEAN)(0==1)));
1039 CpuDeadLoop ();
1040 Index = GetIndexFromStack (Register);
1041 }
1042
1043 // do this here to make sure that we can handle a page fault
1044 IdtrLoad = mHostContextCommon.Idtr;
1045 AsmWriteIdtr(&IdtrLoad);
1046
1047 InterlockedIncrement (&mHostContextCommon.JoinedCpuNum);
1048
1049 //DEBUG ((EFI_D_INFO, "%ld Register - %08x\n", (UINTN)Index, Register));
1050 Reg = &mGuestContextCommonSmi.GuestContextPerCpu[Index].Register;
1051 Register->Rsp = VmReadN (VMCS_N_GUEST_RSP_INDEX0x681C);
1052 CopyMem (Reg, Register, sizeof(X86_REGISTER));
1053
1054 if (mHostContextCommon.JoinedCpuNum > mHostContextCommon.CpuNum) {
1055 DEBUG ((EFI_D_ERROR, "%ld JoinedCpuNum(%d) > CpuNum(%d)\n", Index, (UINTN)mHostContextCommon.JoinedCpuNum, (UINTN)mHostContextCommon.CpuNum))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%ld JoinedCpuNum(%d) > CpuNum(%d)\n"
, Index, (UINTN)mHostContextCommon.JoinedCpuNum, (UINTN)mHostContextCommon
.CpuNum); } } while (((BOOLEAN)(0==1)));
1056 // Reset system
1057 CpuDeadLoop ();
1058 }
1059
1060 return ;
1061}
1062
1063/**
1064
1065 This function initialize common part for BSP and AP.
1066
1067 @param Index CPU index
1068
1069**/
1070VOIDvoid
1071CommonInit (
1072 IN UINT32 Index
1073 )
1074{
1075 UINTN StackBase;
1076 UINTN StackSize;
1077 STM_HEADER *StmHeader;
1078 UINT32 RegEdx;
1079 IA32_VMX_MISC_MSR VmxMisc;
1080
1081 AsmWriteCr4 (AsmReadCr4 () | CR4_OSFXSR(1u << 9) | CR4_OSXMMEXCPT(1u << 10));
1082 if (IsXStateSupoprted()) {
1083 AsmWriteCr4 (AsmReadCr4 () | CR4_OSXSAVE(1u << 18));
1084 }
1085
1086 VmxMisc.Uint64 = AsmReadMsr64 (IA32_VMX_MISC_MSR_INDEX0x485);
1087 RegEdx = ReadUnaligned32 ((UINT32 *)&mGuestContextCommonSmi.GuestContextPerCpu[Index].Register.Rdx);
1088 if ((RegEdx & STM_CONFIG_SMI_UNBLOCKING_BY_VMX_OFF0x1) != 0) {
1089 if (VmxMisc.Bits.VmxOffUnblockSmiSupport != 0) {
1090 AsmWriteMsr64 (IA32_SMM_MONITOR_CTL_MSR_INDEX0x9B, AsmReadMsr64(IA32_SMM_MONITOR_CTL_MSR_INDEX0x9B) | IA32_SMM_MONITOR_SMI_UNBLOCKING_BY_VMX_OFF(1u << 2));
1091 }
1092 }
1093
1094 mHostContextCommon.HostContextPerCpu[Index].Index = Index;
1095 mHostContextCommon.HostContextPerCpu[Index].ApicId = (UINT8)ReadLocalApicId ();
1096 mHostContextCommon.HostContextPerCpu[Index].Vmxon = VmRead64(VMCS_64_CONTROL_EXECUTIVE_VMCS_PTR_INDEX0x200C);
1097
1098 StmHeader = mHostContextCommon.StmHeader;
1099 StackBase = (UINTN)StmHeader +
1100 STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize))( ((((StmHeader->SwStmHdr.StaticImageSize) >> 12) + (
((StmHeader->SwStmHdr.StaticImageSize) & 0xFFF) ? 1 : 0
))) << 12) +
1101 StmHeader->SwStmHdr.AdditionalDynamicMemorySize;
1102 StackSize = StmHeader->SwStmHdr.PerProcDynamicMemorySize;
1103 mHostContextCommon.HostContextPerCpu[Index].Stack = (UINTN)(StackBase + StackSize * (Index + 1)); // Stack Top
1104
1105 if ((VmxMisc.Uint64 & BIT150x00008000) != 0) {
1106 mHostContextCommon.HostContextPerCpu[Index].Smbase = (UINT32)AsmReadMsr64 (IA32_SMBASE_INDEX0x9E);
1107 } else {
1108 mHostContextCommon.HostContextPerCpu[Index].Smbase = VmRead32 (VMCS_32_GUEST_SMBASE_INDEX0x4828);
1109 }
1110 mHostContextCommon.HostContextPerCpu[Index].TxtProcessorSmmDescriptor = (TXT_PROCESSOR_SMM_DESCRIPTOR *)(UINTN)(mHostContextCommon.HostContextPerCpu[Index].Smbase + SMM_TXTPSD_OFFSET0xfb00);
1111 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Cr3 = (UINTN)mHostContextCommon.HostContextPerCpu[Index].TxtProcessorSmmDescriptor->SmmCr3;
1112 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Efer = AsmReadMsr64 (IA32_EFER_MSR_INDEX0xC0000080);
1113
1114 mGuestContextCommonSmi.GuestContextPerCpu[Index].Efer = AsmReadMsr64 (IA32_EFER_MSR_INDEX0xC0000080);
1115}
1116
1117/**
1118
1119 This function initialize VMCS.
1120
1121 @param Index CPU index
1122
1123**/
1124VOIDvoid
1125VmcsInit (
1126 IN UINT32 Index
1127 )
1128{
1129 UINT64 CurrentVmcs;
1130 UINTN VmcsBase;
1131 UINT32 VmcsSize;
1132 STM_HEADER *StmHeader;
1133 UINTN Rflags;
1134
1135 StmHeader = mHostContextCommon.StmHeader;
1136 /* have to use Cr3Offset because StaticImageSize ignores BSS and Data sections */
1137 VmcsBase = (UINTN)StmHeader +
1138 //STM_PAGES_TO_SIZE (STM_SIZE_TO_PAGES (StmHeader->SwStmHdr.StaticImageSize)) +
1139 StmHeader->HwStmHdr.Cr3Offset +
1140 StmHeader->SwStmHdr.AdditionalDynamicMemorySize +
1141 StmHeader->SwStmHdr.PerProcDynamicMemorySize * mHostContextCommon.CpuNum;
1142 VmcsSize = GetVmcsSize();
1143
1144 mGuestContextCommonSmi.GuestContextPerCpu[Index].Vmcs = (UINT64)(VmcsBase + VmcsSize * (Index * 2));
1145 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Vmcs = (UINT64)(VmcsBase + VmcsSize * (Index * 2 + 1));
1146
1147 DEBUG ((EFI_D_INFO, "%d SmiVmcsPtr - %016lx\n", (UINTN)Index, mGuestContextCommonSmi.GuestContextPerCpu[Index].Vmcs))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "%d SmiVmcsPtr - %016lx\n"
, (UINTN)Index, mGuestContextCommonSmi.GuestContextPerCpu[Index
].Vmcs); } } while (((BOOLEAN)(0==1)));
1148 DEBUG ((EFI_D_INFO, "%d SmmVmcsPtr - %016lx\n", (UINTN)Index, mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Vmcs))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "%d SmmVmcsPtr - %016lx\n"
, (UINTN)Index, mGuestContextCommonSmm[0].GuestContextPerCpu[
Index].Vmcs); } } while (((BOOLEAN)(0==1)));
1149
1150 AsmVmPtrStore (&CurrentVmcs);
1151 DEBUG ((EFI_D_INFO, "%d CurrentVmcs - %016lx VmcsSize %x\n", (UINTN)Index, CurrentVmcs, VmcsSize))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "%d CurrentVmcs - %016lx VmcsSize %x\n"
, (UINTN)Index, CurrentVmcs, VmcsSize); } } while (((BOOLEAN)
(0==1)));
1152 if (IsOverlap (CurrentVmcs, VmcsSize, mHostContextCommon.TsegBase, mHostContextCommon.TsegLength)) {
1153 // Overlap TSEG
1154 DEBUG ((EFI_D_ERROR, "%d CurrentVmcs violation - %016lx\n", (UINTN)Index, CurrentVmcs))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%d CurrentVmcs violation - %016lx\n"
, (UINTN)Index, CurrentVmcs); } } while (((BOOLEAN)(0==1)));
1155 DumpVmcsAllField(Index);
1156 CpuDeadLoop() ;
1157 }
1158 Rflags = AsmVmClear (&CurrentVmcs);
1159 if ((Rflags & (RFLAGS_CF1u | RFLAGS_ZF(1u << 6))) != 0) {
1160 DEBUG ((EFI_D_ERROR, "%d ERROR: AsmVmClear - %016lx : %08x\n", (UINTN)Index, CurrentVmcs, Rflags))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%d ERROR: AsmVmClear - %016lx : %08x\n"
, (UINTN)Index, CurrentVmcs, Rflags); } } while (((BOOLEAN)(0
==1)));
1161 CpuDeadLoop ();
1162 }
1163
1164 CopyMem (
1165 (VOIDvoid *)(UINTN)mGuestContextCommonSmi.GuestContextPerCpu[Index].Vmcs,
1166 (VOIDvoid *)(UINTN)CurrentVmcs,
1167 (UINTN)VmcsSize
1168 );
1169 CopyMem (
1170 (VOIDvoid *)(UINTN)mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Vmcs,
1171 (VOIDvoid *)(UINTN)CurrentVmcs,
1172 (UINTN)VmcsSize
1173 );
1174
1175 *(UINT32 *)(UINTN)mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Vmcs = (UINT32)AsmReadMsr64 (IA32_VMX_BASIC_MSR_INDEX0x480) & 0xFFFFFFFF;
1176
1177 AsmWbinvd ();
1178
1179 Rflags = AsmVmPtrLoad (&mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Vmcs);
1180 if ((Rflags & (RFLAGS_CF1u | RFLAGS_ZF(1u << 6))) != 0) {
1181 DEBUG ((EFI_D_ERROR, "%d ERROR: AsmVmPtrLoad - %016lx : %08x\n", (UINTN)Index, mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Vmcs, Rflags))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%d ERROR: AsmVmPtrLoad - %016lx : %08x\n"
, (UINTN)Index, mGuestContextCommonSmm[0].GuestContextPerCpu[
Index].Vmcs, Rflags); } } while (((BOOLEAN)(0==1)));
1182 CpuDeadLoop ();
1183 }
1184 InitializeSmmVmcs (Index, &mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Vmcs);
1185 Rflags = AsmVmClear (&mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Vmcs);
1186 if ((Rflags & (RFLAGS_CF1u | RFLAGS_ZF(1u << 6))) != 0) {
1187 DEBUG ((EFI_D_ERROR, "%d ERROR: AsmVmClear - %016lx : %08x\n", (UINTN)Index, mGuestContextCommonSmm[SMI_HANDLER].GuestContextPerCpu[Index].Vmcs, Rflags))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%d ERROR: AsmVmClear - %016lx : %08x\n"
, (UINTN)Index, mGuestContextCommonSmm[0].GuestContextPerCpu[
Index].Vmcs, Rflags); } } while (((BOOLEAN)(0==1)));
1188 CpuDeadLoop ();
1189 }
1190
1191 AsmWbinvd ();
1192
1193 Rflags = AsmVmPtrLoad (&mGuestContextCommonSmi.GuestContextPerCpu[Index].Vmcs);
1194 if ((Rflags & (RFLAGS_CF1u | RFLAGS_ZF(1u << 6))) != 0) {
1195 DEBUG ((EFI_D_ERROR, "%d ERROR: AsmVmPtrLoad - %016lx : %08x\n", (UINTN)Index, mGuestContextCommonSmi.GuestContextPerCpu[Index].Vmcs, Rflags))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%d ERROR: AsmVmPtrLoad - %016lx : %08x\n"
, (UINTN)Index, mGuestContextCommonSmi.GuestContextPerCpu[Index
].Vmcs, Rflags); } } while (((BOOLEAN)(0==1)));
1196 CpuDeadLoop ();
1197 }
1198 InitializeSmiVmcs (Index, &mGuestContextCommonSmi.GuestContextPerCpu[Index].Vmcs);
1199}
1200
1201/**
1202
1203 This function launch back to MLE.
1204
1205 @param Index CPU index
1206
1207**/
1208VOIDvoid
1209LaunchBack (
1210 IN UINT32 Index
1211 )
1212{
1213 UINTN Rflags;
1214 X86_REGISTER *Reg;
1215
1216 Reg = &mGuestContextCommonSmi.GuestContextPerCpu[Index].Register;
1217#if 0
1218 //
1219 // Dump BIOS resource - already dumped
1220 //
1221 if ((Index == 0) && (ReadUnaligned32 ((UINT32 *)&Reg->Rax) == STM_API_INITIALIZE_PROTECTION0x00010007)) {
1222 DEBUG ((EFI_D_INFO, "BIOS resource:\n"))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "BIOS resource:\n"
); } } while (((BOOLEAN)(0==1)));
1223 DumpStmResource ((STM_RSC *)(UINTN)mHostContextCommon.HostContextPerCpu[0].TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr);
1224 }
1225#endif
1226 if (ReadUnaligned32 ((UINT32 *)&Reg->Rax) == STM_API_START0x00010001) {
1227 // We need do additional thing for STM_API_START
1228 mGuestContextCommonSmm[SMI_HANDLER0].GuestContextPerCpu[Index].Actived = TRUE((BOOLEAN)(1==1));
1229 SmmSetup (Index);
1230 }
1231
1232 if(!IsResourceListValid ((STM_RSC *)(UINTN)mHostContextCommon.HostContextPerCpu[Index].TxtProcessorSmmDescriptor->BiosHwResourceRequirementsPtr, FALSE((BOOLEAN)(0==1)))) {
1233 DEBUG ((EFI_D_INFO, "%ld LaunchBack - ValidateBiosResourceList fail!\n", Index))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "%ld LaunchBack - ValidateBiosResourceList fail!\n"
, Index); } } while (((BOOLEAN)(0==1)));
1234 WriteUnaligned32 ((UINT32 *)&Reg->Rax, ERROR_STM_MALFORMED_RESOURCE_LIST0x8001000D);
1235 VmWriteN (VMCS_N_GUEST_RFLAGS_INDEX0x6820, VmReadN(VMCS_N_GUEST_RFLAGS_INDEX0x6820) | RFLAGS_CF1u);
1236 } else {
1237 WriteUnaligned32 ((UINT32 *)&Reg->Rax, STM_SUCCESS0x00000000);
1238 VmWriteN (VMCS_N_GUEST_RFLAGS_INDEX0x6820, VmReadN(VMCS_N_GUEST_RFLAGS_INDEX0x6820) & ~RFLAGS_CF1u);
1239 }
1240 WriteUnaligned32 ((UINT32 *)&Reg->Rbx, 0); // Not support STM_RSC_BGM or STM_RSC_BGI or STM_RSC_MSR
1241
1242 DEBUG ((EFI_D_INFO, "%ld !!!LaunchBack!!!\n", (UINTN)Index))do { if (DebugPrintEnabled ()) { DebugPrint (0x00000040, "%ld !!!LaunchBack!!!\n"
, (UINTN)Index); } } while (((BOOLEAN)(0==1)));
1243
1244 if(Index != 0)
1245 {
1246 // syncs the AP CPUS - all will wait until the BSP has completed setting up the API
1247 CpuReadySync(Index);
1248 }
1249 else
1250 {
1251 // DumpVmcsAllField();
1252 }
1253 AsmWbinvd(); // flush caches
1254 Rflags = AsmVmLaunch (Reg);
1255
1256 AcquireSpinLock (&mHostContextCommon.DebugLock);
1257 DEBUG ((EFI_D_ERROR, "%ld !!!LaunchBack FAIL!!!\n", Index))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%ld !!!LaunchBack FAIL!!!\n"
, Index); } } while (((BOOLEAN)(0==1)));
1258 DEBUG ((EFI_D_ERROR, "%ld Rflags: %08x\n", Index, Rflags))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%ld Rflags: %08x\n"
, Index, Rflags); } } while (((BOOLEAN)(0==1)));
1259 DEBUG ((EFI_D_ERROR, "%ld VMCS_32_RO_VM_INSTRUCTION_ERROR: %08x\n", Index, (UINTN)VmRead32 (VMCS_32_RO_VM_INSTRUCTION_ERROR_INDEX)))do { if (DebugPrintEnabled ()) { DebugPrint (0x80000000, "%ld VMCS_32_RO_VM_INSTRUCTION_ERROR: %08x\n"
, Index, (UINTN)VmRead32 (0x4400)); } } while (((BOOLEAN)(0==
1)));
1260 ReleaseSpinLock (&mHostContextCommon.DebugLock);
1261
1262 CpuDeadLoop ();
1263}
1264
1265/**
1266
1267 This function initialize STM.
1268
1269 @param Register X86 register context
1270
1271**/
1272
1273VOIDvoid
1274InitializeSmmMonitor (
1275 IN X86_REGISTER *Register
1276 )
1277{
1278 UINT32 Index;
1279
1280 Index = GetIndexFromStack (Register);
1281 if (Index == 0) {
1282 // The build process should make sure "virtual address" is same as "file pointer to raw data",
1283 // in final PE/COFF image, so that we can let StmLoad load binrary to memory directly.
1284 // If no, GenStm tool will "load image". So here, we just need "relocate image"
1285 RelocateStmImage (FALSE((BOOLEAN)(0==1)));
1286 BspInit (Register);
1287 } else {
1288 Index = GetIndexFromStack (Register);
1289 ApInit (Index, Register);
1290 }
1291
1292 CommonInit (Index);
1293
1294 VmcsInit (Index);
1295 //
1296 AsmWbinvd(); // flush caches
1297 LaunchBack (Index);
1298 return ;
1299}
1300
1301static unsigned int CpuSynched;
1302
1303VOIDvoid InitCpuReadySync()
1304{
1305 CpuReadyCount = 0; // count of CPUs waiting in the loop
1306 CpuSynched = 0; // when 0 - not synched yet; when 1 CPUs are synched, but all have not exited the loop
1307 // need to prevent CPUs from entering the loop until all CPUs have exited
1308 AsmWbinvd (); // force it out
1309}
1310
1311VOIDvoid CpuReadySync(UINT32 Index)
1312{
1313 while(InterlockedCompareExchange32(&CpuSynched, 1, 1) == 1 /*CpuSynched == 1*/) {} // prevent processors from entering the synch loop until all the previous processors have left
1314
1315 InterlockedIncrement(&CpuReadyCount);
1316
1317 //DEBUG ((EFI_D_ERROR, "%ld CpuReadySync - CpuReadyCount: %d CpuNum %d\n", Index, CpuReadyCount, mHostContextCommon.CpuNum));
1318 while(InterlockedCompareExchange32(&CpuSynched, 0, 0) == 0)//( CpuReadyCount < mHostContextCommon.CpuNum)
1319 {
1320 // spin until all CPUs are synced
1321
1322 if((InterlockedCompareExchange32(&CpuSynched, 0, 0) == 0 /*CpuSynched == 0*/) &&
1323 InterlockedCompareExchange32(&CpuReadyCount, mHostContextCommon.CpuNum, mHostContextCommon.CpuNum)== mHostContextCommon.CpuNum)
1324 {
1325 InterlockedCompareExchange32(&CpuSynched, 0, 1); //CpuSynched = 1;
1326 //DEBUG((EFI_D_ERROR, "%ld CpuReadySync - CpuSynched set to 1\n", Index));
1327 }
1328 }
1329
1330 if(InterlockedDecrement(&CpuReadyCount) == 0)
1331 {
1332 InterlockedCompareExchange32(&CpuSynched, 1, 0); // CpuSynched = 0;
1333 // DEBUG((EFI_D_ERROR, "%ld CpuReadySync - CpuSynched set to 0\n", Index));
1334 }
1335
1336 // DEBUG((EFI_D_ERROR, "%ld CpuReadySync - Cpu Released - CpuReadyCount: %d, \n", Index, CpuReadyCount));//could cause problems
1337}
1338