Coreboot Options: Difference between revisions

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This is an automatically generated list of '''coreboot compile-time options'''.
{{#externalredirect: https://coreboot.org/status/kconfig-options.html }}
 
Last update: 2008/01/27 01:59:29.
 
{| border="0"
|- bgcolor="#6699dd"
! align="left" | Option
! align="left" | Comment
! align="left" | Default
! align="left" | Export
! align="left" | Format
|- bgcolor="#eeeeee"
|
ARCH
|
"Default architecture is i386, options are alpha and ppc"
|
"i386"
|
always
|
 
|- bgcolor="#eeeeee"
|
HAVE_MOVNTI
|
"This cpu supports the MOVNTI directive"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CROSS_COMPILE
|
"Cross compiler prefix"
|
""
|
always
|
 
|- bgcolor="#eeeeee"
|
CC
|
"Target C Compiler"
|
"$(CROSS_COMPILE)gcc"
|
always
|
 
|- bgcolor="#eeeeee"
|
HOSTCC
|
"Host C Compiler"
|
"gcc"
|
always
|
 
|- bgcolor="#eeeeee"
|
CPU_OPT
|
"Additional per-cpu CFLAGS"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
OBJCOPY
|
"Objcopy command"
|
"$(CROSS_COMPILE)objcopy --gap-fill 0xff"
|
always
|
 
|- bgcolor="#eeeeee"
|
COREBOOT_VERSION
|
"coreboot version"
|
"2.0.0"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_EXTRA_VERSION
|
 
|
 
|
 
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_BUILD
|
"Build date"
|
"$(shell date)"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_COMPILE_TIME
|
"Build time"
|
"$(shell date +%T)"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_COMPILE_BY
|
"Who build this image"
|
"$(shell whoami)"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_COMPILE_HOST
|
"Build host"
|
"$(shell hostname)"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_COMPILE_DOMAIN
|
"Build domain name"
|
"$(shell dnsdomainname)"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_COMPILER
|
"Build compiler"
|
"$(shell $(CC) $(CFLAGS) -v 2>&1 | tail -n 1)"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_LINKER
|
"Build linker"
|
"$(shell  $(CC) -Wl,--version 2>&1 | grep version | tail -n 1)"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
COREBOOT_ASSEMBLER
|
"Build assembler"
|
"$(shell  touch dummy.s ; $(CC) -c -Wa,-v dummy.s 2>&1; rm -f dummy.s dummy.o )"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
CONFIG_CHIP_CONFIGURE
|
"Use new chip_configure method for configuring (non-pci) devices"
|
0
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_USE_INIT
|
"Use stage 1 initialization code"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
HAVE_FALLBACK_BOOT
|
"Set if fallback booting required"
|
0
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
HAVE_FAILOVER_BOOT
|
"Set if failover booting required"
|
0
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
USE_FALLBACK_IMAGE
|
"Set to build a fallback image"
|
0
|
used
|
"%d"
|- bgcolor="#eeeeee"
|
USE_FAILOVER_IMAGE
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
FALLBACK_SIZE
|
"Default fallback image size"
|
65536
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
FAILOVER_SIZE
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
ROM_SIZE
|
"Size of your ROM"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
ROM_IMAGE_SIZE
|
"Default image size"
|
65535
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
ROM_SECTION_SIZE
|
"Default rom section size"
|
{FALLBACK_SIZE}
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
ROM_SECTION_OFFSET
|
"Default rom section offset"
|
{ROM_SIZE - FALLBACK_SIZE}
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
PAYLOAD_SIZE
|
"Default payload size"
|
{ROM_SECTION_SIZE - ROM_IMAGE_SIZE}
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
_ROMBASE
|
"Base address of coreboot in ROM"
|
{PAYLOAD_SIZE}
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
_ROMSTART
|
"Start address of coreboot in ROM"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
_RESET
|
"Hardware reset vector address"
|
{_ROMBASE}
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
_EXCEPTION_VECTORS
|
"Address of exception vector table"
|
{_ROMBASE+0x100}
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
STACK_SIZE
|
"Default stack size"
|
0x2000
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
HEAP_SIZE
|
"Default heap size"
|
0x2000
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
_RAMBASE
|
"Base address of coreboot in RAM"
|
none
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
_RAMSTART
|
"Start address of coreboot in RAM"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
USE_DCACHE_RAM
|
"Use data cache as temporary RAM if possible"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CAR_FAM10
|
"AMD family 10 CAR requires additional setup"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
DCACHE_RAM_BASE
|
"Base address of data cache when using it for temporary RAM"
|
0xc0000
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
DCACHE_RAM_SIZE
|
"Size of data cache when using it for temporary RAM"
|
0x1000
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
DCACHE_RAM_GLOBAL_VAR_SIZE
|
"Size of region that for global variable of cache as ram stage"
|
0
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
CONFIG_AP_CODE_IN_CAR
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
MEM_TRAIN_SEQ
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
WAIT_BEFORE_CPUS_INIT
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
XIP_ROM_BASE
|
"Start address of area to cache during coreboot execution directly from ROM"
|
0
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
XIP_ROM_SIZE
|
"Size of area to cache during coreboot execution directly from ROM"
|
0
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
CONFIG_COMPRESS
|
"Set for compressed image"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_UNCOMPRESSED
|
"Set for uncompressed image"
|
{!CONFIG_COMPRESS}
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
CONFIG_LB_MEM_TOPK
|
"Kilobytes of memory to initialized before executing code from RAM"
|
2048
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
HAVE_OPTION_TABLE
|
"Export CMOS option table"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
USE_OPTION_TABLE
|
"Use option table"
|
{HAVE_OPTION_TABLE && !USE_FALLBACK_IMAGE}
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
LB_CKS_RANGE_START
|
"First CMOS byte to use for coreboot options"
|
49
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
LB_CKS_RANGE_END
|
"Last CMOS byte to use for coreboot options"
|
125
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
LB_CKS_LOC
|
"Pair of bytes to use for CMOS checksum"
|
126
|
always
|
"%d"
|- bgcolor="#eeeeee"
|
CRT0
|
"Main initialization target"
|
"$(TOP)/src/arch/$(ARCH)/init/crt0.S.lb"
|
always
|
 
|- bgcolor="#eeeeee"
|
DEBUG
|
"Enable debugging code"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CONSOLE_VGA
|
"Log messages to any VGA-compatible device (may require *_ROM_RUN to bring up)"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CONSOLE_VGA_MULTI
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CONSOLE_VGA_ONBOARD_AT_FIRST
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CONSOLE_BTEXT
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CONSOLE_LOGBUF
|
"Log messages to buffer"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CONSOLE_SROM
|
"Log messages to SROM console"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CONSOLE_SERIAL8250
|
"Log messages to 8250 uart based serial console"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_USBDEBUG_DIRECT
|
"Log messages to ehci debug port console"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
DEFAULT_CONSOLE_LOGLEVEL
|
"Console will log at this level unless changed"
|
7
|
always
|
 
|- bgcolor="#eeeeee"
|
MAXIMUM_CONSOLE_LOGLEVEL
|
 
|
8
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SERIAL_POST
|
"Enable SERIAL POST codes"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
NO_POST
|
"Disable POST codes"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
TTYS0_BASE
|
"Base address for 8250 uart for the serial console"
|
0x3f8
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
TTYS0_BAUD
|
"Default baud rate for serial console"
|
115200
|
always
|
 
|- bgcolor="#eeeeee"
|
TTYS0_DIV
|
"Allow UART divisor to be set explicitly"
|
none
|
used
|
"%d"
|- bgcolor="#eeeeee"
|
TTYS0_LCS
|
"Default flow control settings for the 8250 serial console uart"
|
0x3
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
CONFIG_USE_PRINTK_IN_CAR
|
"use printk instead of print in CAR stage code"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
MAINBOARD
|
"Mainboard name"
|
"Mainboard_not_set"
|
always
|
 
|- bgcolor="#eeeeee"
|
MAINBOARD_PART_NUMBER
|
"Part number of mainboard"
|
"Part_number_not_set"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
MAINBOARD_VENDOR
|
"Vendor of mainboard"
|
"Vendor_not_set"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
|
"PCI Vendor ID of mainboard manufacturer"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
|
"PCI susbsystem device id assigned my mainboard manufacturer"
|
0
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
MAINBOARD_POWER_ON_AFTER_POWER_FAIL
|
"Default power on after power fail setting"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SYS_CLK_FREQ
|
"System clock frequency in MHz"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_MAX_PCI_BUSES
|
"Maximum number of PCI buses to search for devices"
|
255
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SMP
|
"Define if we support SMP"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_MAX_CPUS
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_MAX_PHYSICAL_CPUS
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_LOGICAL_CPUS
|
"Should multiple cpus per die be enabled?"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
HAVE_MP_TABLE
|
"Define to build an MP table"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
SERIAL_CPU_INIT
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
APIC_ID_OFFSET
|
"We need to share this value between cache_as_ram_auto.c and northbridge.c"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
ENABLE_APIC_EXT_ID
|
"Enable APIC ext id mode 8 bit"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
LIFT_BSP_APIC_ID
|
"decide if we lift bsp apic id while ap apic id"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_IDE_PAYLOAD
|
"Boot from IDE device"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_ROM_PAYLOAD
|
"Boot image is located in ROM"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_ROM_PAYLOAD_START
|
"ROM stream start location"
|
{0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1}
|
always
|
"0x%x"
|- bgcolor="#eeeeee"
|
CONFIG_COMPRESSED_PAYLOAD_NRV2B
|
"NRV2B compressed boot image is located in ROM"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_COMPRESSED_PAYLOAD_LZMA
|
"LZMA compressed boot image is located in ROM"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_PRECOMPRESSED_PAYLOAD
|
"boot image is already compressed"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SERIAL_PAYLOAD
|
"Download boot image from serial port"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_FS_PAYLOAD
|
"Boot from a filesystem"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_FS_EXT2
|
"Enable ext2 filesystem support"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_FS_ISO9660
|
"Enable ISO9660 filesystem support"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_FS_FAT
|
"Enable FAT filesystem support"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
AUTOBOOT_DELAY
|
"Delay (in seconds) before autobooting"
|
2
|
always
|
 
|- bgcolor="#eeeeee"
|
AUTOBOOT_CMDLINE
|
"Default command line when autobooting"
|
"hdc1:/vmlinuz root=/dev/hdc3 console=tty0 console=ttyS0,115200"
|
always
|
"\"%s\""
|- bgcolor="#eeeeee"
|
USE_WATCHDOG_ON_BOOT
|
"Use the watchdog on booting"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT
|
"Enable support for plugin Hypertransport busses"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_AGP_PLUGIN_SUPPORT
|
"Enable support for plugin AGP busses"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CARDBUS_PLUGIN_SUPPORT
|
"Enable support cardbus plugin cards"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_PCIX_PLUGIN_SUPPORT
|
"Enable support for plugin PCI-X busses"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_PCIEXP_PLUGIN_SUPPORT
|
"Enable support for plugin PCI-E busses"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
HAVE_PIRQ_TABLE
|
"Define if we have a PIRQ table"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
IRQ_SLOT_COUNT
|
"Number of IRQ slots"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_PCIBIOS_IRQ
|
"PCIBIOS IRQ support"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_IOAPIC
|
"IOAPIC support"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_IDE
|
"Define to include IDE support"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
IDE_BOOT_DRIVE
|
"Disk number of boot drive"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
IDE_SWAB
|
"Swap bytes when reading from IDE device"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
IDE_OFFSET
|
"Sector at which to start searching for boot image"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
PCI_IO_CFG_EXT
|
"allow 4K register space via io CFG port"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
PCIC0_CFGADDR
|
"Address of PCI Configuration Address Register"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
PCIC0_CFGDATA
|
"Address of PCI Configuration Data Register"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
ISA_IO_BASE
|
"Base address of PCI/ISA I/O address range"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
ISA_MEM_BASE
|
"Base address of PCI/ISA memory address range"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
PNP_CFGADDR
|
"PNP Configuration Address Register offset"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
PNP_CFGDATA
|
"PNP Configuration Data Register offset"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
_IO_BASE
|
"Base address of memory mapped I/O operations"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
EMBEDDED_RAM_SIZE
|
"Embedded boards generally have fixed RAM size"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_CHIP_NAME
|
"Compile in the chip name"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_GDB_STUB
|
"Compile in gdb stub support?"
|
0
|
used
|
 
|- bgcolor="#eeeeee"
|
HAVE_INIT_TIMER
|
"Have a init_timer function"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
HAVE_HARD_RESET
|
"Have hard reset"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
MEMORY_HOLE
|
"Set to deal with memory hole"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
MAX_REBOOT_CNT
|
"Set maximum reboots"
|
3
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
"Use timer2 to callibrate the x86 time stamp counter"
|
0
|
used
|
 
|- bgcolor="#eeeeee"
|
INTEL_PPRO_MTRR
|
""
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_UDELAY_TSC
|
"Implement udelay with the x86 time stamp counter"
|
0
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_UDELAY_IO
|
"Implement udelay with x86 io registers"
|
0
|
used
|
 
|- bgcolor="#eeeeee"
|
FAKE_SPDROM
|
"Use this to fake spd rom values"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
HAVE_ACPI_TABLES
|
"Define to build ACPI tables"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
ACPI_SSDTX_NUM
|
"extra ssdt num for PCI Device"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
AGP_APERTURE_SIZE
|
"AGP graphics virtual memory aperture size"
|
none
|
used
|
"0x%x"
|- bgcolor="#eeeeee"
|
HT_CHAIN_UNITID_BASE
|
"this will be first hypertransport device's unitid base, if sb ht chain only has one ht device, it could be 0"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
HT_CHAIN_END_UNITID_BASE
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
SB_HT_CHAIN_UNITID_OFFSET_ONLY
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
SB_HT_CHAIN_ON_BUS0
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
PCI_BUS_SEGN_BITS
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
MMCONF_SUPPORT
|
"enable mmconfig for pci conf"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
MMCONF_SUPPORT_DEFAULT
|
"enable mmconfig for pci conf"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
HW_MEM_HOLE_SIZEK
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
HW_MEM_HOLE_SIZE_AUTO_INC
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_VAR_MTRR_HOLE
|
"using hole in MTRR instead of increasing method"
|
1
|
always
|
 
|- bgcolor="#eeeeee"
|
K8_HT_FREQ_1G_SUPPORT
|
"Optern E0 later could support 1G HT, but still depends MB design"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
K8_REV_F_SUPPORT
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CBB
|
"Opteron cpu bus num base"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CDB
|
"Opteron cpu device num base"
|
0x18
|
always
|
 
|- bgcolor="#eeeeee"
|
HT3_SUPPORT
|
"Hypertransport 3 support, include ac HT and unganged sublink feature"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
EXT_RT_TBL_SUPPORT
|
"support AMD family 10 extended routing table via F0x158, normally is enabled when node nums is greater than 8"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
EXT_CONF_SUPPORT
|
"support AMD family 10 extended config space for ram, bus, io, mmio via F1x110, normally is enabled when HT3 is enabled and non ht chain nums is greater than 4"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
DIMM_SUPPORT
|
 
|
 
|
 
|
"0x%x"
|- bgcolor="#eeeeee"
|
CPU_SOCKET_TYPE
|
"cpu socket type, 0x10 mean Socket F, 0x11 mean socket M2, 0x20, Soxket G, and 0x21 mean socket M3"
|
0x10
|
always
|
 
|- bgcolor="#eeeeee"
|
CPU_ADDR_BITS
|
"CPU hardware address lines num, for AMD K8 could be 40, and AMD family 10 could be 48"
|
36
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_VGA_ROM_RUN
|
"Init x86 ROMs on VGA-class PCI devices"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_PCI_ROM_RUN
|
"Init x86 ROMs on all PCI devices"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_PCI_64BIT_PREF_MEM
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_AMDMCT
|
"use AMD MCT to init RAM instead of native code"
|
0
|
always
|
 
|- bgcolor="#eeeeee"
|
CONFIG_VIDEO_MB
|
 
|
 
|
 
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SPLASH_GRAPHIC
|
"Paint a splash screen"
|
0
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_GX1_VIDEO
|
"Build in GX1's graphic support"
|
0
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_GX1_VIDEOMODE
|
"Define video mode after reset"
|
none
|
used
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SANDPOINT_ALTIMUS
|
"Configure Sandpoint with Altimus PMC"
|
0
|
never
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SANDPOINT_TALUS
|
"Configure Sandpoint with Talus PMC"
|
0
|
never
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SANDPOINT_UNITY
|
"Configure Sandpoint with Unity PMC"
|
0
|
never
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SANDPOINT_VALIS
|
"Configure Sandpoint with Valis PMC"
|
0
|
never
|
 
|- bgcolor="#eeeeee"
|
CONFIG_SANDPOINT_GYRUS
|
"Configure Sandpoint with Gyrus PMC"
|
0
|
never
|
 
|- bgcolor="#eeeeee"
|
CONFIG_BRIQ_750FX
|
"Configure briQ with PowerPC 750FX"
|
0
|
never
|
 
|- bgcolor="#eeeeee"
|
CONFIG_BRIQ_7400
|
"Configure briQ with PowerPC G4"
|
0
|
never
|
 
|}

Latest revision as of 20:02, 9 June 2018

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