Difference between revisions of "Board:asus/m4a785-m"
Revision as of 23:21, 18 January 2014
This HOWTO explains how to use coreboot on the ASUS M4A785-M board.
|CPU works||OK||Tested: AMD Athlon64 X2 240e.|
|L1 cache enabled||OK||-|
|L2 cache enabled||OK||-|
|L3 cache enabled||N/A|
|Multiple CPU support||N/A|
|Hardware virtualization||OK||Tested: Virtualbox|
|DDR2||WiP||2G works, 4G or more does not.|
|Dual channel support||Untested|
|On-board IDE 3.5"||OK||Tested: CDROM, SSD|
|On-board IDE 2.5"||N/A|
|On-board SATA||OK||Tested: SATA ports 1-4. Ports 5-6 untested.|
|On-board VGA||OK||Tested: DVI. Untested: HDMI, analog VGA.|
|On-board Audio||No||Linux driver crashes.|
|On-board Smartcard reader||N/A|
|On-board SD card reader||N/A|
|ISA add-on cards||N/A|
|Audio/Modem-Riser (AMR/CNR) cards||N/A|
|PCI add-on cards||OK||See known issues.|
|Mini-PCI add-on cards||N/A|
|Mini-PCI-Express add-on cards||Unknown|
|PCI-X add-on cards||N/A|
|AGP graphics cards||N/A|
|PCI Express x1 add-on cards|
|PCI Express x2 add-on cards||N/A|
|PCI Express x4 add-on cards||Untested|
|PCI Express x8 add-on cards||N/A|
|PCI Express x16 add-on cards||Untested|
|PCI Express x32 add-on cards||N/A|
|HTX add-on cards||N/A|
|Legacy / Super I/O|
|Floppy||N/A||There is no floppy connector at all.|
|Serial port 1 (COM1)||OK||COM1 is only pin header on board. DB-9 serial connector is available, but not included with board.|
|Serial port 2 (COM2)||N/A|
|Parallel port||Untested||No connector, pins on board only|
|Sensors / fan control||Untested|
|CPU frequency scaling||Untested|
|Other powersaving features||Untested|
|ACPI||Partial||Linux recognizes ACPI at boot, but operation unknown.|
|High precision event timers (HPET)|
|Random number generator (RNG)||Untested|
|Wake on modem ring||Untested|
|Wake on LAN|
|Wake on keyboard||Untested|
|Wake on mouse||Untested|
See the Build HOWTO for general information on how to build coreboot.
Here are two alternative build methods. When the second one is tested to work, the first one should be removed from this page.
Flashrom should be able to detect, read, and write the BIOS ROM, if the version is new enough. The ROM chip is Macronix MX25L8005PC-15G in DIP-8 package and accessed via SPI.
Method 1: Older trunk and apply patches
This is a more complicated method, but it is tested to work with Coreboot revision 5795 and 5792. Find patches from the mailing list.
1. Check out Coreboot revision 5795 from SVN
2. chdir to coreboot3.
svn cp src/mainboard/amd/tilapia_fam10 src/mainboard/asus/m4a785-m
4. Apply patches
% patch -p1 < ../patches/asus-m4a785m-small-patch.patch % patch -p1 < ../patches/multiboot-table-after-cb-table-r5756-v2.patch % patch -p1 < ../patches/generic-code-patches-for-m4a785m.patch
The multiboot table patch is necessary for using Grub2 as payload.5.
- Select mainboard vendor Asus and model M4A785-M
- Select ROM chip size 1 MByte
- Select Use VGA console once initialized
- Select Use onboard VGA as primary video device (if you are using it)
- Add payload (grub2 and coreinfo tested to work)
- Add VGA BIOS, if you are going to use the onboard VGA.
The BIOS for the on-board ATI Radeon HD 4200 can be extracted with dd from /dev/mem as shown in VGA_support . The bios_extract utility can extract some other option ROMs, but it crashes before it gets the VGA ROM.
- If on-board VGA BIOS is added, set VGA device PCI IDs to "1002,9710"
- The result should be a working coreboot.rom.
Method 2: Latest trunk code
The patches used above are integrated to the Coreboot trunk in revision 5809 and later. However, revision 5796 introduced some changes that cause the SATA and USB controllers to not work anymore.
This will likely be corrected in some later revision, but it is not tested.
Trunk version can be built using the above instructions, but obviously skipping the svn copy and patching steps.
- The on-board "Azalia" audio codec does not work. Linux probes and finds it, but the driver in Linux 2.6.32 either crashes or causes a flood of interupts. The solution is to configure Linux to not load the driver snd-hda-intel module on boot.
- After flashing Coreboot, soft reboot to Coreboot usually fails. Hard reset button results in a successful boot.
- 2 GB RAM (1x2GB) - Boots
- 4 GB RAM (2x2GB) - Payload crashes
- 6 GB RAM (3x2GB) - Payload crashes